ARM: omap1: Switch to use MULTI_IRQ
This allows us to get a bit further with SPARSE_IRQ and MULTIARCH support. Note that we now also rename omap_irq_flags to omap_l2_irq as that's the omap_irq_flags naming is confusing. It just contains the interrupt number for the l2 irq. Cc: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@@ -1,39 +0,0 @@
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/*
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* arch/arm/mach-omap1/include/mach/entry-macro.S
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*
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* Low-level IRQ helper macros for OMAP-based platforms
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*
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* Copyright (C) 2009 Texas Instruments
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <mach/hardware.h>
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#include <mach/irqs.h>
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \base, =OMAP1_IO_ADDRESS(OMAP_IH1_BASE)
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ldr \irqnr, [\base, #IRQ_ITR_REG_OFFSET]
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ldr \tmp, [\base, #IRQ_MIR_REG_OFFSET]
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mov \irqstat, #0xffffffff
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bic \tmp, \irqstat, \tmp
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tst \irqnr, \tmp
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beq 1510f
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ldr \irqnr, [\base, #IRQ_SIR_FIQ_REG_OFFSET]
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ldr \tmp, =omap_irq_flags @ irq flags address
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ldr \tmp, [\tmp, #0] @ irq flags value
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cmp \irqnr, #0
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ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
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cmpeq \irqnr, \tmp
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ldreq \base, =OMAP1_IO_ADDRESS(OMAP_IH2_BASE)
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ldreq \irqnr, [\base, #IRQ_SIR_IRQ_REG_OFFSET]
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addeqs \irqnr, \irqnr, #32
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1510:
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.endm
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