Merge tag 'mailbox-v5.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration

Pull mailbox updates from Jassi Brar:

 - qcom:
     - enable support for ipq8074, sm1850 and sm7180
     - add child device node for qcs404
     - misc fixes

 - mediatek:
     - enable support for mt8183
     - misc rejig of cmdq driver
     - new client-reg dt property

 - armada:
     - use device-managed registration api

* tag 'mailbox-v5.4' of git://git.linaro.org/landing-teams/working/fujitsu/integration:
  mailbox: qcom-apcs: fix max_register value
  mailbox: qcom: Add support for IPQ8074 APCS
  dt-bindings: mailbox: qom: Add ipq8074 APPS compatible
  mailbox: qcom: Add support for Qualcomm SM8150 and SC7180 SoCs
  dt-bindings: mailbox: Add APSS shared for SM8150 and SC7180 SoCs
  mbox: qcom: replace integer with valid macro
  mbox: qcom: add APCS child device for QCS404
  mailbox: mediatek: cmdq: clear the event in cmdq initial flow
  mailbox: mediatek: cmdq: support mt8183 gce function
  mailbox: mediatek: cmdq: move the CMDQ_IRQ_MASK into cmdq driver data
  dt-binding: gce: add binding for gce client reg property
  dt-binding: gce: add gce header file for mt8183
  dt-binding: gce: remove thread-num property
  mailbox: armada-37xx-rwtm: Use device-managed registration API
This commit is contained in:
Linus Torvalds
2019-09-19 14:01:47 -07:00
8 changed files with 222 additions and 33 deletions

View File

@@ -9,7 +9,7 @@ CMDQ driver uses mailbox framework for communication. Please refer to
mailbox.txt for generic information about mailbox device-tree bindings.
Required properties:
- compatible: Must be "mediatek,mt8173-gce"
- compatible: can be "mediatek,mt8173-gce" or "mediatek,mt8183-gce"
- reg: Address range of the GCE unit
- interrupts: The interrupt signal from the GCE block
- clock: Clocks according to the common clock binding
@@ -25,11 +25,19 @@ Required properties:
Required properties for a client device:
- mboxes: Client use mailbox to communicate with GCE, it should have this
property and list of phandle, mailbox specifiers.
- mediatek,gce-subsys: u32, specify the sub-system id which is corresponding
to the register address.
Optional properties for a client device:
- mediatek,gce-client-reg: Specify the sub-system id which is corresponding
to the register address, it should have this property and list of phandle,
sub-system specifiers.
<&phandle subsys_number start_offset size>
phandle: Label name of a gce node.
subsys_number: specify the sub-system id which is corresponding
to the register address.
start_offset: the start offset of register address that GCE can access.
size: the total size of register address that GCE can access.
Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h'. Such as
sub-system ids, thread priority, event ids.
Some vaules of properties are defined in 'dt-bindings/gce/mt8173-gce.h'
or 'dt-binding/gce/mt8183-gce.h'. Such as sub-system ids, thread priority, event ids.
Example:
@@ -39,7 +47,6 @@ Example:
interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_LOW>;
clocks = <&infracfg CLK_INFRA_GCE>;
clock-names = "gce";
thread-num = CMDQ_THR_MAX_COUNT;
#mbox-cells = <3>;
};
@@ -49,9 +56,9 @@ Example for a client device:
compatible = "mediatek,mt8173-mmsys";
mboxes = <&gce 0 CMDQ_THR_PRIO_LOWEST 1>,
<&gce 1 CMDQ_THR_PRIO_LOWEST 1>;
mediatek,gce-subsys = <SUBSYS_1400XXXX>;
mutex-event-eof = <CMDQ_EVENT_MUTEX0_STREAM_EOF
CMDQ_EVENT_MUTEX1_STREAM_EOF>;
mediatek,gce-client-reg = <&gce SUBSYS_1400XXXX 0x3000 0x1000>,
<&gce SUBSYS_1401XXXX 0x2000 0x100>;
...
};

View File

@@ -12,7 +12,10 @@ platforms.
"qcom,msm8996-apcs-hmss-global"
"qcom,msm8998-apcs-hmss-global"
"qcom,qcs404-apcs-apps-global"
"qcom,sc7180-apss-shared"
"qcom,sdm845-apss-shared"
"qcom,sm8150-apss-shared"
"qcom,ipq8074-apcs-apps-global"
- reg:
Usage: required