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scsi: aacraid: Insure we don't access PCIe space during AER/EEH

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There are a few windows during AER/EEH when we can access PCIe I/O mapped
registers. This will harden the access to insure we do not allow PCIe
access during errors

Signed-off-by: Dave Carroll <david.carroll@microsemi.com>
Reviewed-by: Sagar Biradar <sagar.biradar@microchip.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
Dave Carroll
2019-03-22 12:16:03 -06:00
committed by Martin K. Petersen
parent c2fe742ff6
commit b6554cfe09
2 changed files with 8 additions and 3 deletions
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7
drivers/scsi/aacraid/aacraid.h
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@@ -2640,9 +2640,14 @@ static inline unsigned int cap_to_cyls(sector_t capacity, unsigned divisor)
return capacity;
}
static inline int aac_pci_offline(struct aac_dev *dev)
{
return pci_channel_offline(dev->pdev) || dev->handle_pci_error;
}
static inline int aac_adapter_check_health(struct aac_dev *dev)
{
if (unlikely(pci_channel_offline(dev->pdev)))
if (unlikely(aac_pci_offline(dev)))
return -1;
return (dev)->a_ops.adapter_check_health(dev);