Merge tag 'for-linus-20170713' of git://git.infradead.org/linux-mtd
Pull MTD updates from Brian Norris: "General updates: - Cleanups and additional flash support for "dataflash" driver - new driver for mchp23k256 SPI SRAM device - improve handling of MTDs without eraseblocks (i.e., MTD_NO_ERASE) - refactor and improve "sub-partition" handling with TRX partition parser; partitions can now be created as sub-partitions of another partition SPINOR updates, from Cyrille Pitchen and Marek Vasut: - introduce support to the SPI 1-2-2 and 1-4-4 protocols. - introduce support to the Double Data Rate (DDR) mode. - introduce support to the Octo SPI protocols. - add support to new memory parts for Spansion, Macronix and Winbond. - add fixes for the Aspeed, STM32 and Cadence QSPI controler drivers. - clean up the st_spi_fsm driver. NAND updates, from Boris Brezillon: - addition of on-die ECC support to Micron driver - addition of helpers to help drivers choose most appropriate ECC settings - deletion of dead-code (cached programming and ->errstat() hook) - make sure drivers that do not support the SET/GET FEATURES command return ENOTSUPP use a dummy ->set/get_features implementation returning -ENOTSUPP (required for Micron on-die ECC) - change the semantic of ecc->write_page() for drivers setting the NAND_ECC_CUSTOM_PAGE_ACCESS flag - support exiting 'GET STATUS' command in default ->cmdfunc() implementations - change the prototype of ->setup_data_interface() A bunch of driver related changes: - various cleanup, fixes and improvements of the MTK driver - OMAP DT bindings fixes - support for ->setup_data_interface() in the fsmc driver - support for imx7 in the gpmi driver - finalization of the denali driver rework (thanks to Masahiro for the work he's done on this driver) - fix "bitflips in erased pages" handling in the ifc driver - addition of PM ops and dynamic timing configuration to the atmel driver" * tag 'for-linus-20170713' of git://git.infradead.org/linux-mtd: (118 commits) Documentation: ABI: mtd: describe "offset" more precisely mtd: Fix check in mtd_unpoint() mtd: nand: mtk: release lock on error path mtd: st_spi_fsm: remove SPINOR_OP_RDSR2 and use SPINOR_OP_RDCR instead mtd: spi-nor: cqspi: remove duplicate const mtd: spi-nor: Add support for Spansion S25FL064L mtd: spi-nor: Add support for mx66u51235f mtd: nand: mtk: add ->setup_data_interface() hook mtd: nand: mtk: remove unneeded mtk_ecc_hw_init from mtk_ecc_resume mtd: nand: mtk: remove unneeded mtk_nfc_hw_init from mtk_nfc_resume mtd: nand: mtk: disable ecc irq when writing page with hwecc mtd: nand: mtk: fix incorrect register setting order about ecc irq mtd: partitions: fixup some allocate_partition() whitespace mtd: parsers: trx: fix pr_err format for printing offset MAINTAINERS: Update SPI NOR subsystem git repositories mtd: extract TRX parser out of bcm47xxpart into a separated module mtd: partitions: add support for partition parsers mtd: partitions: add support for subpartitions mtd: partitions: rename "master" to the "parent" where appropriate mtd: partitions: remove sysfs files when deleting all master's partitions ...
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@@ -107,6 +107,8 @@ int nand_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len);
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#define NAND_STATUS_READY 0x40
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#define NAND_STATUS_WP 0x80
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#define NAND_DATA_IFACE_CHECK_ONLY -1
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/*
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* Constants for ECC_MODES
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*/
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@@ -116,6 +118,7 @@ typedef enum {
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NAND_ECC_HW,
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NAND_ECC_HW_SYNDROME,
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NAND_ECC_HW_OOB_FIRST,
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NAND_ECC_ON_DIE,
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} nand_ecc_modes_t;
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enum nand_ecc_algo {
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@@ -257,6 +260,8 @@ struct nand_chip;
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/* Vendor-specific feature address (Micron) */
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#define ONFI_FEATURE_ADDR_READ_RETRY 0x89
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#define ONFI_FEATURE_ON_DIE_ECC 0x90
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#define ONFI_FEATURE_ON_DIE_ECC_EN BIT(3)
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/* ONFI subfeature parameters length */
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#define ONFI_SUBFEATURE_PARAM_LEN 4
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@@ -476,6 +481,44 @@ static inline void nand_hw_control_init(struct nand_hw_control *nfc)
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init_waitqueue_head(&nfc->wq);
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}
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/**
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* struct nand_ecc_step_info - ECC step information of ECC engine
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* @stepsize: data bytes per ECC step
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* @strengths: array of supported strengths
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* @nstrengths: number of supported strengths
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*/
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struct nand_ecc_step_info {
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int stepsize;
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const int *strengths;
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int nstrengths;
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};
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/**
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* struct nand_ecc_caps - capability of ECC engine
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* @stepinfos: array of ECC step information
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* @nstepinfos: number of ECC step information
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* @calc_ecc_bytes: driver's hook to calculate ECC bytes per step
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*/
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struct nand_ecc_caps {
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const struct nand_ecc_step_info *stepinfos;
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int nstepinfos;
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int (*calc_ecc_bytes)(int step_size, int strength);
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};
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/* a shorthand to generate struct nand_ecc_caps with only one ECC stepsize */
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#define NAND_ECC_CAPS_SINGLE(__name, __calc, __step, ...) \
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static const int __name##_strengths[] = { __VA_ARGS__ }; \
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static const struct nand_ecc_step_info __name##_stepinfo = { \
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.stepsize = __step, \
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.strengths = __name##_strengths, \
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.nstrengths = ARRAY_SIZE(__name##_strengths), \
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}; \
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static const struct nand_ecc_caps __name = { \
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.stepinfos = &__name##_stepinfo, \
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.nstepinfos = 1, \
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.calc_ecc_bytes = __calc, \
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}
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/**
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* struct nand_ecc_ctrl - Control structure for ECC
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* @mode: ECC mode
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@@ -815,7 +858,10 @@ struct nand_manufacturer_ops {
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* @read_retries: [INTERN] the number of read retry modes supported
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* @onfi_set_features: [REPLACEABLE] set the features for ONFI nand
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* @onfi_get_features: [REPLACEABLE] get the features for ONFI nand
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* @setup_data_interface: [OPTIONAL] setup the data interface and timing
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* @setup_data_interface: [OPTIONAL] setup the data interface and timing. If
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* chipnr is set to %NAND_DATA_IFACE_CHECK_ONLY this
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* means the configuration should not be applied but
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* only checked.
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* @bbt: [INTERN] bad block table pointer
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* @bbt_td: [REPLACEABLE] bad block table descriptor for flash
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* lookup.
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@@ -826,9 +872,6 @@ struct nand_manufacturer_ops {
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* structure which is shared among multiple independent
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* devices.
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* @priv: [OPTIONAL] pointer to private chip data
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* @errstat: [OPTIONAL] hardware specific function to perform
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* additional error status checks (determine if errors are
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* correctable).
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* @manufacturer: [INTERN] Contains manufacturer information
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*/
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@@ -852,16 +895,13 @@ struct nand_chip {
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int(*waitfunc)(struct mtd_info *mtd, struct nand_chip *this);
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int (*erase)(struct mtd_info *mtd, int page);
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int (*scan_bbt)(struct mtd_info *mtd);
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int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state,
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int status, int page);
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int (*onfi_set_features)(struct mtd_info *mtd, struct nand_chip *chip,
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int feature_addr, uint8_t *subfeature_para);
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int (*onfi_get_features)(struct mtd_info *mtd, struct nand_chip *chip,
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int feature_addr, uint8_t *subfeature_para);
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int (*setup_read_retry)(struct mtd_info *mtd, int retry_mode);
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int (*setup_data_interface)(struct mtd_info *mtd,
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const struct nand_data_interface *conf,
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bool check_only);
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int (*setup_data_interface)(struct mtd_info *mtd, int chipnr,
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const struct nand_data_interface *conf);
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int chip_delay;
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@@ -1244,6 +1284,15 @@ int nand_check_erased_ecc_chunk(void *data, int datalen,
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void *extraoob, int extraooblen,
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int threshold);
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int nand_check_ecc_caps(struct nand_chip *chip,
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const struct nand_ecc_caps *caps, int oobavail);
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int nand_match_ecc_req(struct nand_chip *chip,
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const struct nand_ecc_caps *caps, int oobavail);
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int nand_maximize_ecc(struct nand_chip *chip,
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const struct nand_ecc_caps *caps, int oobavail);
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/* Default write_oob implementation */
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int nand_write_oob_std(struct mtd_info *mtd, struct nand_chip *chip, int page);
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@@ -1258,6 +1307,19 @@ int nand_read_oob_std(struct mtd_info *mtd, struct nand_chip *chip, int page);
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int nand_read_oob_syndrome(struct mtd_info *mtd, struct nand_chip *chip,
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int page);
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/* Stub used by drivers that do not support GET/SET FEATURES operations */
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int nand_onfi_get_set_features_notsupp(struct mtd_info *mtd,
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struct nand_chip *chip, int addr,
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u8 *subfeature_param);
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/* Default read_page_raw implementation */
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int nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
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uint8_t *buf, int oob_required, int page);
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/* Default write_page_raw implementation */
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int nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip,
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const uint8_t *buf, int oob_required, int page);
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/* Reset and initialize a NAND device */
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int nand_reset(struct nand_chip *chip, int chipnr);
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