xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

drm/armada: push interlace calculation into armada_drm_plane_calc()

Browse Source 
Push the interlaced frame calculation down into armada_drm_plane_calc()
which needs to apply the same correction for both the overlay and
primary planes.

Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk>
This commit is contained in:
Russell King
2018-07-30 11:52:34 +01:00
parent 4aafe00e2f
commit b5bae71a79
3 changed files with 30 additions and 28 deletions
Download Patch File Download Diff File Expand all files Collapse all files

16
drivers/gpu/drm/armada/armada_overlay.c
View File

@@ -131,21 +131,21 @@ static void armada_drm_overlay_plane_atomic_update(struct drm_plane *plane,
old_state->fb != state->fb) {
const struct drm_format_info *format;
u16 src_x, pitches[3];
u32 addrs[3];
u32 addrs[2][3];
armada_drm_plane_calc(state, addrs, pitches);
armada_drm_plane_calc(state, addrs, pitches, false);
armada_reg_queue_set(regs, idx, addrs[0],
armada_reg_queue_set(regs, idx, addrs[0][0],
LCD_SPU_DMA_START_ADDR_Y0);
armada_reg_queue_set(regs, idx, addrs[1],
armada_reg_queue_set(regs, idx, addrs[0][1],
LCD_SPU_DMA_START_ADDR_U0);
armada_reg_queue_set(regs, idx, addrs[2],
armada_reg_queue_set(regs, idx, addrs[0][2],
LCD_SPU_DMA_START_ADDR_V0);
armada_reg_queue_set(regs, idx, addrs[0],
armada_reg_queue_set(regs, idx, addrs[1][0],
LCD_SPU_DMA_START_ADDR_Y1);
armada_reg_queue_set(regs, idx, addrs[1],
armada_reg_queue_set(regs, idx, addrs[1][1],
LCD_SPU_DMA_START_ADDR_U1);
armada_reg_queue_set(regs, idx, addrs[2],
armada_reg_queue_set(regs, idx, addrs[1][2],
LCD_SPU_DMA_START_ADDR_V1);
val = pitches[0] << 16 | pitches[0];