Merge branch 'pci/host' into next
* pci/host: of/pci: Add of_pci_get_max_link_speed() to parse max-link-speed from DT Documentation/devicetree: Add PCIe max-link-speed property
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@@ -18,3 +18,9 @@ driver implementation may support the following properties:
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host bridges in the system, otherwise potentially conflicting domain numbers
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host bridges in the system, otherwise potentially conflicting domain numbers
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may be assigned to root buses behind different host bridges. The domain
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may be assigned to root buses behind different host bridges. The domain
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number for each host bridge in the system must be unique.
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number for each host bridge in the system must be unique.
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- max-link-speed:
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If present this property specifies PCI gen for link capability. Host
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drivers could add this as a strategy to avoid unnecessary operation for
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unsupported link speed, for instance, trying to do training for
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unsupported link speed, etc. Must be '4' for gen4, '3' for gen3, '2'
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for gen2, and '1' for gen1. Any other values are invalid.
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@@ -119,6 +119,27 @@ int of_get_pci_domain_nr(struct device_node *node)
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}
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}
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EXPORT_SYMBOL_GPL(of_get_pci_domain_nr);
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EXPORT_SYMBOL_GPL(of_get_pci_domain_nr);
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/**
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* This function will try to find the limitation of link speed by finding
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* a property called "max-link-speed" of the given device node.
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*
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* @node: device tree node with the max link speed information
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*
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* Returns the associated max link speed from DT, or a negative value if the
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* required property is not found or is invalid.
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*/
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int of_pci_get_max_link_speed(struct device_node *node)
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{
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u32 max_link_speed;
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if (of_property_read_u32(node, "max-link-speed", &max_link_speed) ||
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max_link_speed > 4)
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return -EINVAL;
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return max_link_speed;
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}
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EXPORT_SYMBOL_GPL(of_pci_get_max_link_speed);
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/**
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/**
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* of_pci_check_probe_only - Setup probe only mode if linux,pci-probe-only
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* of_pci_check_probe_only - Setup probe only mode if linux,pci-probe-only
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* is present and valid
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* is present and valid
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@@ -16,6 +16,7 @@ int of_pci_get_devfn(struct device_node *np);
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int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin);
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int of_irq_parse_and_map_pci(const struct pci_dev *dev, u8 slot, u8 pin);
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int of_pci_parse_bus_range(struct device_node *node, struct resource *res);
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int of_pci_parse_bus_range(struct device_node *node, struct resource *res);
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int of_get_pci_domain_nr(struct device_node *node);
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int of_get_pci_domain_nr(struct device_node *node);
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int of_pci_get_max_link_speed(struct device_node *node);
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void of_pci_check_probe_only(void);
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void of_pci_check_probe_only(void);
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int of_pci_map_rid(struct device_node *np, u32 rid,
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int of_pci_map_rid(struct device_node *np, u32 rid,
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const char *map_name, const char *map_mask_name,
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const char *map_name, const char *map_mask_name,
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@@ -62,6 +63,12 @@ static inline int of_pci_map_rid(struct device_node *np, u32 rid,
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return -EINVAL;
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return -EINVAL;
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}
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}
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static inline int
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of_pci_get_max_link_speed(struct device_node *node)
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{
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return -EINVAL;
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}
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static inline void of_pci_check_probe_only(void) { }
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static inline void of_pci_check_probe_only(void) { }
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#endif
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#endif
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