KVM: arm64/sve: Context switch the SVE registers
In order to give each vcpu its own view of the SVE registers, this patch adds context storage via a new sve_state pointer in struct vcpu_arch. An additional member sve_max_vl is also added for each vcpu, to determine the maximum vector length visible to the guest and thus the value to be configured in ZCR_EL2.LEN while the vcpu is active. This also determines the layout and size of the storage in sve_state, which is read and written by the same backend functions that are used for context-switching the SVE state for host tasks. On SVE-enabled vcpus, SVE access traps are now handled by switching in the vcpu's SVE context and disabling the trap before returning to the guest. On other vcpus, the trap is not handled and an exit back to the host occurs, where the handle_sve() fallback path reflects an undefined instruction exception back to the guest, consistently with the behaviour of non-SVE-capable hardware (as was done unconditionally prior to this patch). No SVE handling is added on non-VHE-only paths, since VHE is an architectural and Kconfig prerequisite of SVE. Signed-off-by: Dave Martin <Dave.Martin@arm.com> Reviewed-by: Julien Thierry <julien.thierry@arm.com> Tested-by: zhang.lei <zhang.lei@jp.fujitsu.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
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Marc Zyngier

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73433762fc
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b43b5dd990
@@ -228,6 +228,8 @@ struct vcpu_reset_state {
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struct kvm_vcpu_arch {
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struct kvm_cpu_context ctxt;
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void *sve_state;
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unsigned int sve_max_vl;
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/* HYP configuration */
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u64 hcr_el2;
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@@ -323,6 +325,10 @@ struct kvm_vcpu_arch {
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bool sysregs_loaded_on_cpu;
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};
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/* Pointer to the vcpu's SVE FFR for sve_{save,load}_state() */
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#define vcpu_sve_pffr(vcpu) ((void *)((char *)((vcpu)->arch.sve_state) + \
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sve_ffr_offset((vcpu)->arch.sve_max_vl)))
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/* vcpu_arch flags field values: */
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#define KVM_ARM64_DEBUG_DIRTY (1 << 0)
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#define KVM_ARM64_FP_ENABLED (1 << 1) /* guest FP regs loaded */
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