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clk: rockchip: add new pll-type for rk3399 and similar socs

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The rk3399's pll and clock are similar with rk3036's, it different
with base on the rk3066(rk3188, rk3288, rk3368 use it), there are
different adjust foctors and control registers, so these should be
independent and separate from the series of rk3066s.

Signed-off-by: Xing Zheng <zhengxing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Xing Zheng
2016-03-10 11:47:01 +08:00
committed by Heiko Stuebner
parent ef1d9feecc
commit b40baccd23
2 changed files with 272 additions and 2 deletions
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3
drivers/clk/rockchip/clk.h
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@@ -96,6 +96,7 @@ struct clk;
enum rockchip_pll_type {
pll_rk3036,
pll_rk3066,
pll_rk3399,
};
#define RK3036_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1, \
@@ -150,7 +151,7 @@ struct rockchip_pll_rate_table {
unsigned int nf;
unsigned int no;
unsigned int nb;
/* for RK3036 */
/* for RK3036/RK3399 */
unsigned int fbdiv;
unsigned int postdiv1;
unsigned int refdiv;