Merge branch 'clk-amlogic' into clk-next
* clk-amlogic: clk: meson: meson8b: add the vclk2_en gate clock clk: meson: meson8b: add the vclk_en gate clock clk: meson: meson8b: Drop CLK_IS_CRITICAL from fclk_div2 clk: meson: g12a: Add support for NNA CLK source clocks dt-bindings: clk: g12a-clkc: Add NNA CLK Source clock IDs
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@@ -145,5 +145,7 @@
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#define CLKID_CPU3_CLK 255
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#define CLKID_SPICC0_SCLK 258
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#define CLKID_SPICC1_SCLK 261
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#define CLKID_NNA_AXI_CLK 264
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#define CLKID_NNA_CORE_CLK 267
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#endif /* __G12A_CLKC_H */
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