Merge tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC late updates from Olof Johansson: "A couple of late-merged changes that would be useful to get in this merge window: - Driver support for reset of audio complex on Meson platforms. The audio driver went in this merge window, and these changes have been in -next for a while (just not in our tree). - Power management fixes for IOMMU on Rockchip platforms, getting closer to kexec working on them, including Chromebooks. - Another pass updating "arm,psci" -> "psci" for some properties that have snuck in since last time it was done" * tag 'armsoc-late' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: iommu/rockchip: Move irq request past pm_runtime_enable iommu/rockchip: Handle errors returned from PM framework arm64: rockchip: Force CONFIG_PM on Rockchip systems ARM: rockchip: Force CONFIG_PM on Rockchip systems arm64: dts: Fix various entry-method properties to reflect documentation reset: imx7: Fix always writing bits as 0 reset: meson: add meson audio arb driver reset: meson: add dt-bindings for meson-axg audio arb
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@@ -94,7 +94,7 @@ cpus {
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};
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idle-states {
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entry-method = "arm,psci";
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entry-method = "psci";
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CPU_SLEEP_0: cpu-sleep-0 {
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compatible = "arm,idle-state";
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@@ -237,8 +237,8 @@ processor idle states, defined as device tree nodes, are listed.
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Value type: <stringlist>
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Usage and definition depend on ARM architecture version.
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# On ARM v8 64-bit this property is required and must
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be one of:
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- "psci" (see bindings in [2])
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be:
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- "psci"
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# On ARM 32-bit systems this property is optional
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The nodes describing the idle states (state) can only be defined within the
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@@ -0,0 +1,21 @@
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* Amlogic audio memory arbiter controller
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The Amlogic Audio ARB is a simple device which enables or
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disables the access of Audio FIFOs to DDR on AXG based SoC.
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Required properties:
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- compatible: 'amlogic,meson-axg-audio-arb'
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- reg: physical base address of the controller and length of memory
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mapped region.
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- clocks: phandle to the fifo peripheral clock provided by the audio
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clock controller.
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- #reset-cells: must be 1.
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Example on the A113 SoC:
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arb: reset-controller@280 {
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compatible = "amlogic,meson-axg-audio-arb";
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reg = <0x0 0x280 0x0 0x4>;
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#reset-cells = <1>;
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clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
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};
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