Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann: "Driver updates for ARM SoCs. A handful of driver changes this time around. The larger changes are: - Reset drivers for hi3660 and zx2967 - AHCI driver for Davinci, acked by Tejun and brought in here due to platform dependencies - Cleanups of atmel-ebi (External Bus Interface) - Tweaks for Rockchip GRF (General Register File) usage (kitchensink misc register range on the SoCs) - PM domains changes for support of two new ZTE SoCs (zx296718 and zx2967)" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (53 commits) soc: samsung: pmu: Add register defines for pad retention control reset: make zx2967 explicitly non-modular reset: core: fix reset_control_put soc: samsung: pm_domains: Read domain name from the new label property soc: samsung: pm_domains: Remove message about failed memory allocation soc: samsung: pm_domains: Remove unused name field soc: samsung: pm_domains: Use full names in subdomains registration log sata: ahci-da850: un-hardcode the MPY bits sata: ahci-da850: add a workaround for controller instability sata: ahci: export ahci_do_hardreset() locally sata: ahci-da850: implement a workaround for the softreset quirk sata: ahci-da850: add device tree match table sata: ahci-da850: get the sata clock using a connection id soc: samsung: pmu: Remove duplicated define for ARM_L2_OPTION register memory: atmel-ebi: Enable the SMC clock if specified soc: samsung: pmu: Remove unused and duplicated defines memory: atmel-ebi: Properly handle multiple reference to the same CS memory: atmel-ebi: Fix the test to enable generic SMC logic soc: samsung: pm_domains: Add new Exynos5433 compatible soc: samsung: pmu: Add dummy support for Exynos5433 SoC ...
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@@ -345,9 +345,9 @@ static void exynos5420_pm_prepare(void)
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if (IS_ENABLED(CONFIG_EXYNOS5420_MCPM))
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pmu_raw_writel(virt_to_phys(mcpm_entry_point), S5P_INFORM0);
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tmp = pmu_raw_readl(EXYNOS5_ARM_L2_OPTION);
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tmp &= ~EXYNOS5_USE_RETENTION;
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pmu_raw_writel(tmp, EXYNOS5_ARM_L2_OPTION);
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tmp = pmu_raw_readl(EXYNOS_L2_OPTION(0));
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tmp &= ~EXYNOS_L2_USE_RETENTION;
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pmu_raw_writel(tmp, EXYNOS_L2_OPTION(0));
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tmp = pmu_raw_readl(EXYNOS5420_SFR_AXI_CGDIS1);
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tmp |= EXYNOS5420_UFS;
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