Intel IOMMU Suspend/Resume Support - Interrupt Remapping
This patch enables suspend/resume for interrupt remapping. During suspend, interrupt remapping is disabled. When resume, interrupt remapping is enabled again. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Acked-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
此提交包含在：
Fenghua Yu
@@ -1304,6 +1304,7 @@ void __init enable_IR_x2apic(void)
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#ifdef CONFIG_INTR_REMAP
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int ret;
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unsigned long flags;
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struct IO_APIC_route_entry **ioapic_entries = NULL;
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if (!cpu_has_x2apic)
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return;
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@@ -1334,17 +1335,23 @@ void __init enable_IR_x2apic(void)
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return;
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}
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ret = save_IO_APIC_setup();
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ioapic_entries = alloc_ioapic_entries();
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if (!ioapic_entries) {
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pr_info("Allocate ioapic_entries failed: %d\n", ret);
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goto end;
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}
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ret = save_IO_APIC_setup(ioapic_entries);
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if (ret) {
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pr_info("Saving IO-APIC state failed: %d\n", ret);
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goto end;
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}
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local_irq_save(flags);
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mask_IO_APIC_setup();
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mask_IO_APIC_setup(ioapic_entries);
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mask_8259A();
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ret = enable_intr_remapping(1);
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ret = enable_intr_remapping(EIM_32BIT_APIC_ID);
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if (ret && x2apic_preenabled) {
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local_irq_restore(flags);
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@@ -1364,9 +1371,9 @@ end_restore:
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/*
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* IR enabling failed
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*/
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restore_IO_APIC_setup();
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restore_IO_APIC_setup(ioapic_entries);
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else
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reinit_intr_remapped_IO_APIC(x2apic_preenabled);
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reinit_intr_remapped_IO_APIC(x2apic_preenabled, ioapic_entries);
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unmask_8259A();
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local_irq_restore(flags);
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@@ -1379,6 +1386,8 @@ end:
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pr_info("Enabled Interrupt-remapping\n");
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} else
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pr_err("Failed to enable Interrupt-remapping and x2apic\n");
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if (ioapic_entries)
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free_ioapic_entries(ioapic_entries);
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#else
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if (!cpu_has_x2apic)
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return;
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@@ -1954,6 +1963,10 @@ static int lapic_suspend(struct sys_device *dev, pm_message_t state)
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local_irq_save(flags);
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disable_local_APIC();
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#ifdef CONFIG_INTR_REMAP
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if (intr_remapping_enabled)
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disable_intr_remapping();
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#endif
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local_irq_restore(flags);
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return 0;
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}
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@@ -1964,15 +1977,41 @@ static int lapic_resume(struct sys_device *dev)
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unsigned long flags;
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int maxlvt;
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#ifdef CONFIG_INTR_REMAP
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int ret;
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struct IO_APIC_route_entry **ioapic_entries = NULL;
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if (!apic_pm_state.active)
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return 0;
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maxlvt = lapic_get_maxlvt();
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local_irq_save(flags);
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if (x2apic) {
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ioapic_entries = alloc_ioapic_entries();
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if (!ioapic_entries) {
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WARN(1, "Alloc ioapic_entries in lapic resume failed.");
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return -ENOMEM;
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}
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ret = save_IO_APIC_setup(ioapic_entries);
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if (ret) {
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WARN(1, "Saving IO-APIC state failed: %d\n", ret);
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free_ioapic_entries(ioapic_entries);
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return ret;
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}
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mask_IO_APIC_setup(ioapic_entries);
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mask_8259A();
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enable_x2apic();
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}
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#else
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if (!apic_pm_state.active)
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return 0;
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local_irq_save(flags);
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if (x2apic)
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enable_x2apic();
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#endif
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else {
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/*
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* Make sure the APICBASE points to the right address
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@@ -1986,6 +2025,7 @@ static int lapic_resume(struct sys_device *dev)
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wrmsr(MSR_IA32_APICBASE, l, h);
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}
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maxlvt = lapic_get_maxlvt();
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apic_write(APIC_LVTERR, ERROR_APIC_VECTOR | APIC_LVT_MASKED);
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apic_write(APIC_ID, apic_pm_state.apic_id);
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apic_write(APIC_DFR, apic_pm_state.apic_dfr);
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@@ -2009,8 +2049,20 @@ static int lapic_resume(struct sys_device *dev)
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apic_write(APIC_ESR, 0);
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apic_read(APIC_ESR);
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#ifdef CONFIG_INTR_REMAP
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if (intr_remapping_enabled)
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reenable_intr_remapping(EIM_32BIT_APIC_ID);
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if (x2apic) {
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unmask_8259A();
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restore_IO_APIC_setup(ioapic_entries);
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free_ioapic_entries(ioapic_entries);
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}
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#endif
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local_irq_restore(flags);
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return 0;
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}
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@@ -2048,7 +2100,9 @@ static int __init init_lapic_sysfs(void)
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error = sysdev_register(&device_lapic);
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return error;
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}
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device_initcall(init_lapic_sysfs);
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/* local apic needs to resume before other devices access its registers. */
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core_initcall(init_lapic_sysfs);
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#else /* CONFIG_PM */
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@@ -851,63 +851,74 @@ __setup("pirq=", ioapic_pirq_setup);
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#endif /* CONFIG_X86_32 */
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#ifdef CONFIG_INTR_REMAP
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/* I/O APIC RTE contents at the OS boot up */
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static struct IO_APIC_route_entry *early_ioapic_entries[MAX_IO_APICS];
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struct IO_APIC_route_entry **alloc_ioapic_entries(void)
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{
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int apic;
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struct IO_APIC_route_entry **ioapic_entries;
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ioapic_entries = kzalloc(sizeof(*ioapic_entries) * nr_ioapics,
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GFP_ATOMIC);
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if (!ioapic_entries)
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return 0;
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for (apic = 0; apic < nr_ioapics; apic++) {
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ioapic_entries[apic] =
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kzalloc(sizeof(struct IO_APIC_route_entry) *
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nr_ioapic_registers[apic], GFP_ATOMIC);
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if (!ioapic_entries[apic])
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goto nomem;
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}
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return ioapic_entries;
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nomem:
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while (--apic >= 0)
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kfree(ioapic_entries[apic]);
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kfree(ioapic_entries);
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return 0;
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}
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/*
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* Saves all the IO-APIC RTE's
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*/
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int save_IO_APIC_setup(void)
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int save_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries)
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{
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union IO_APIC_reg_01 reg_01;
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unsigned long flags;
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int apic, pin;
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/*
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* The number of IO-APIC IRQ registers (== #pins):
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*/
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for (apic = 0; apic < nr_ioapics; apic++) {
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spin_lock_irqsave(&ioapic_lock, flags);
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reg_01.raw = io_apic_read(apic, 1);
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spin_unlock_irqrestore(&ioapic_lock, flags);
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nr_ioapic_registers[apic] = reg_01.bits.entries+1;
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}
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if (!ioapic_entries)
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return -ENOMEM;
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for (apic = 0; apic < nr_ioapics; apic++) {
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early_ioapic_entries[apic] =
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kzalloc(sizeof(struct IO_APIC_route_entry) *
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nr_ioapic_registers[apic], GFP_KERNEL);
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if (!early_ioapic_entries[apic])
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goto nomem;
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}
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if (!ioapic_entries[apic])
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return -ENOMEM;
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for (apic = 0; apic < nr_ioapics; apic++)
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for (pin = 0; pin < nr_ioapic_registers[apic]; pin++)
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early_ioapic_entries[apic][pin] =
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ioapic_entries[apic][pin] =
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ioapic_read_entry(apic, pin);
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}
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return 0;
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nomem:
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while (apic >= 0)
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kfree(early_ioapic_entries[apic--]);
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memset(early_ioapic_entries, 0,
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ARRAY_SIZE(early_ioapic_entries));
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return -ENOMEM;
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}
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void mask_IO_APIC_setup(void)
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/*
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* Mask all IO APIC entries.
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*/
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void mask_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries)
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{
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int apic, pin;
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if (!ioapic_entries)
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return;
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for (apic = 0; apic < nr_ioapics; apic++) {
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if (!early_ioapic_entries[apic])
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if (!ioapic_entries[apic])
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break;
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for (pin = 0; pin < nr_ioapic_registers[apic]; pin++) {
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struct IO_APIC_route_entry entry;
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entry = early_ioapic_entries[apic][pin];
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entry = ioapic_entries[apic][pin];
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if (!entry.mask) {
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entry.mask = 1;
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ioapic_write_entry(apic, pin, entry);
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@@ -916,22 +927,30 @@ void mask_IO_APIC_setup(void)
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}
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}
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void restore_IO_APIC_setup(void)
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/*
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* Restore IO APIC entries which was saved in ioapic_entries.
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*/
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int restore_IO_APIC_setup(struct IO_APIC_route_entry **ioapic_entries)
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{
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int apic, pin;
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if (!ioapic_entries)
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return -ENOMEM;
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for (apic = 0; apic < nr_ioapics; apic++) {
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if (!early_ioapic_entries[apic])
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break;
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if (!ioapic_entries[apic])
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return -ENOMEM;
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for (pin = 0; pin < nr_ioapic_registers[apic]; pin++)
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ioapic_write_entry(apic, pin,
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early_ioapic_entries[apic][pin]);
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kfree(early_ioapic_entries[apic]);
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early_ioapic_entries[apic] = NULL;
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ioapic_entries[apic][pin]);
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}
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return 0;
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}
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void reinit_intr_remapped_IO_APIC(int intr_remapping)
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void reinit_intr_remapped_IO_APIC(int intr_remapping,
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struct IO_APIC_route_entry **ioapic_entries)
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{
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/*
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* for now plain restore of previous settings.
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@@ -940,7 +959,17 @@ void reinit_intr_remapped_IO_APIC(int intr_remapping)
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* table entries. for now, do a plain restore, and wait for
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* the setup_IO_APIC_irqs() to do proper initialization.
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*/
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restore_IO_APIC_setup();
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restore_IO_APIC_setup(ioapic_entries);
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}
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void free_ioapic_entries(struct IO_APIC_route_entry **ioapic_entries)
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{
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int apic;
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for (apic = 0; apic < nr_ioapics; apic++)
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kfree(ioapic_entries[apic]);
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kfree(ioapic_entries);
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}
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#endif
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