Merge tag 'drm-intel-next-2018-09-06-2' of git://anongit.freedesktop.org/drm/drm-intel into drm-next
Merge tag 'gvt-next-2018-09-04' drm-intel-next-2018-09-06-1: UAPI Changes: - GGTT coherency GETPARAM: GGTT has turned out to be non-coherent for some platforms, which we've failed to communicate to userspace so far. SNA was modified to do extra flushing on non-coherent GGTT access, while Mesa will mitigate by always requiring WC mapping (which is non-coherent anyway). - Neuter Resource Streamer uAPI: There never really were users for the feature, so neuter it while keeping the interface bits for compatibility. This is a long due item from past. Cross-subsystem Changes: - Backmerge of branch drm-next-4.19 for DP_DPCD_REV_14 changes Core Changes: - None Driver Changes: - A load of Icelake (ICL) enabling patches (Paulo, Manasi) - Enabled full PPGTT for IVB,VLV and HSW (Chris) - Bugzilla #107113: Distribute DDB based on display resolutions (Mahesh) - Bugzillas #100023,#107476,#94921: Support limited range DP displays (Jani) - Bugzilla #107503: Increase LSPCON timeout (Fredrik) - Avoid boosting GPU due to an occasional stall in interactive workloads (Chris) - Apply GGTT coherency W/A only for affected systems instead of all (Chris) - Fix for infinite link training loop for faulty USB-C MST hubs (Nathan) - Keep KMS functional on Gen4 and earlier when GPU is wedged (Chris) - Stop holding ppGTT reference from closed VMAs (Chris) - Clear error registers after error capture (Lionel) - Various Icelake fixes (Anusha, Jyoti, Ville, Tvrtko) - Add missing Coffeelake (CFL) PCI IDs (Rodrigo) - Flush execlists tasklet directly from reset-finish (Chris) - Fix LPE audio runtime PM (Chris) - Fix detection of out of range surface positions (GLK/CNL) (Ville) - Remove wait-for-idle for PSR2 (Dhinakaran) - Power down existing display hardware resources when display is disabled (Chris) - Don't allow runtime power management if RC6 doesn't exist (Chris) - Add debugging checks for runtime power management paths (Imre) - Increase symmetry in display power init/fini paths (Imre) - Isolate GVT specific macros from i915_reg.h (Lucas) - Increase symmetry in power management enable/disable paths (Chris) - Increase IP disable timeout to 100 ms to avoid DRM_ERROR (Imre) - Fix memory leak from HDMI HDCP write function (Brian, Rodrigo) - Reject Y/Yf tiling on interlaced modes (Ville) - Use a cached mapping for the physical HWS on older gens (Chris) - Force slow path of writing relocations to buffer if unable to write to userspace (Chris) - Do a full device reset after being wedged (Chris) - Keep forcewake counts over reset (in case of debugfs user) (Imre, Chris) - Avoid false-positive errors from power wells during init (Imre) - Reset engines forcibly in exchange of declaring whole device wedged (Mika) - Reduce context HW ID lifetime in preparation for Icelake (Chris) - Attempt to recover from module load failures (Chris) - Keep select interrupts over a reset to avoid missing/losing them (Chris) - GuC submission backend improvements (Jakub) - Terminate context images with BB_END (Chris, Lionel) - Make GCC evaluate GGTT view struct size assertions again (Ville) - Add selftest to exercise suspend/hibernate code-paths for GEM (Chris) - Use a full emulation of a user ppgtt context in selftests (Chris) - Exercise resetting in the middle of a wait-on-fence in selftests (Chris) - Fix coherency issues on selftests for Baytrail (Chris) - Various other GEM fixes / self-test updates (Chris, Matt) - GuC doorbell self-tests (Daniele) - PSR mode control through debugfs for IGTs (Maarten) - Degrade expected WM latency errors to DRM_DEBUG_KMS (Chris) - Cope with errors better in MST link training (Dhinakaran) - Fix WARN on KBL external displays (Azhar) - Power well code cleanups (Imre) - Fixes to PSR debugging (Dhinakaran) - Make forcewake errors louder for easier catching in CI (WARNs) (Chris) - Fortify tiling code against programmer errors (Chris) - Bunch of fixes for CI exposed corner cases (multiple authors, mostly Chris) Signed-off-by: Dave Airlie <airlied@redhat.com> From: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180907105446.GA22860@jlahtine-desk.ger.corp.intel.com
这个提交包含在：
Dave Airlie
@@ -132,35 +132,6 @@ static int populate_shadow_context(struct intel_vgpu_workload *workload)
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unsigned long context_gpa, context_page_num;
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int i;
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gvt_dbg_sched("ring id %d workload lrca %x", ring_id,
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workload->ctx_desc.lrca);
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context_page_num = gvt->dev_priv->engine[ring_id]->context_size;
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context_page_num = context_page_num >> PAGE_SHIFT;
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if (IS_BROADWELL(gvt->dev_priv) && ring_id == RCS)
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context_page_num = 19;
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i = 2;
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while (i < context_page_num) {
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context_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm,
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(u32)((workload->ctx_desc.lrca + i) <<
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I915_GTT_PAGE_SHIFT));
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if (context_gpa == INTEL_GVT_INVALID_ADDR) {
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gvt_vgpu_err("Invalid guest context descriptor\n");
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return -EFAULT;
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}
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page = i915_gem_object_get_page(ctx_obj, LRC_HEADER_PAGES + i);
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dst = kmap(page);
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intel_gvt_hypervisor_read_gpa(vgpu, context_gpa, dst,
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I915_GTT_PAGE_SIZE);
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kunmap(page);
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i++;
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}
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page = i915_gem_object_get_page(ctx_obj, LRC_STATE_PN);
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shadow_ring_context = kmap(page);
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@@ -195,6 +166,37 @@ static int populate_shadow_context(struct intel_vgpu_workload *workload)
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sr_oa_regs(workload, (u32 *)shadow_ring_context, false);
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kunmap(page);
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if (IS_RESTORE_INHIBIT(shadow_ring_context->ctx_ctrl.val))
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return 0;
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gvt_dbg_sched("ring id %d workload lrca %x", ring_id,
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workload->ctx_desc.lrca);
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context_page_num = gvt->dev_priv->engine[ring_id]->context_size;
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context_page_num = context_page_num >> PAGE_SHIFT;
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if (IS_BROADWELL(gvt->dev_priv) && ring_id == RCS)
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context_page_num = 19;
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i = 2;
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while (i < context_page_num) {
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context_gpa = intel_vgpu_gma_to_gpa(vgpu->gtt.ggtt_mm,
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(u32)((workload->ctx_desc.lrca + i) <<
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I915_GTT_PAGE_SHIFT));
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if (context_gpa == INTEL_GVT_INVALID_ADDR) {
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gvt_vgpu_err("Invalid guest context descriptor\n");
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return -EFAULT;
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}
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page = i915_gem_object_get_page(ctx_obj, LRC_HEADER_PAGES + i);
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dst = kmap(page);
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intel_gvt_hypervisor_read_gpa(vgpu, context_gpa, dst,
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I915_GTT_PAGE_SIZE);
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kunmap(page);
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i++;
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}
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return 0;
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}
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@@ -1138,6 +1140,7 @@ out_shadow_ctx:
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/**
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* intel_vgpu_select_submission_ops - select virtual submission interface
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* @vgpu: a vGPU
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* @engine_mask: either ALL_ENGINES or target engine mask
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* @interface: expected vGPU virtual submission interface
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*
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* This function is called when guest configures submission interface.
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@@ -1190,7 +1193,7 @@ int intel_vgpu_select_submission_ops(struct intel_vgpu *vgpu,
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/**
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* intel_vgpu_destroy_workload - destroy a vGPU workload
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* @vgpu: a vGPU
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* @workload: workload to destroy
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*
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* This function is called when destroy a vGPU workload.
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*
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@@ -1282,6 +1285,7 @@ static int prepare_mm(struct intel_vgpu_workload *workload)
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/**
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* intel_vgpu_create_workload - create a vGPU workload
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* @vgpu: a vGPU
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* @ring_id: ring index
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* @desc: a guest context descriptor
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*
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* This function is called when creating a vGPU workload.
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