Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm

* 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm:
  [ARM] 4081/1: Add definition for TI Sync Serial Protocol
  [ARM] 4080/1: Fix for the SSCR0_SlotsPerFrm macro
  [ARM] Fix VFP initialisation issue for SMP systems
  [ARM] 4078/1: Fix ARM copypage cache coherency problems
  [ARM] 4077/1: iop13xx: fix __io() macro
  [ARM] 4074/1: Flat loader stack alignment
  [ARM] 4073/1: Prevent s3c24xx drivers from including asm/arch/hardware.h and asm/arch/irqs.h
  [ARM] 4071/1: S3C24XX: Documentation update
  [ARM] 4066/1: correct a comment about PXA's sched_clock range
  [ARM] 4065/1: S3C24XX: dma printk fixes
  [ARM] 4064/1: make pxa_get_cycles() static
  [ARM] 4063/1: ep93xx: fix IRQ_EP93XX_GPIO?MUX numbering

arch/arm/mach-iop13xx/io.c

@@ -21,6 +21,25 @@
 #include <asm/hardware.h>
 #include <asm/io.h>
 
+void * __iomem __iop13xx_io(unsigned long io_addr)
+{
+	void __iomem * io_virt;
+
+	switch (io_addr) {
+	case IOP13XX_PCIE_LOWER_IO_PA ... IOP13XX_PCIE_UPPER_IO_PA:
+		io_virt = (void *) IOP13XX_PCIE_IO_PHYS_TO_VIRT(io_addr);
+		break;
+	case IOP13XX_PCIX_LOWER_IO_PA ... IOP13XX_PCIX_UPPER_IO_PA:
+		io_virt = (void *) IOP13XX_PCIX_IO_PHYS_TO_VIRT(io_addr);
+		break;
+	default:
+		BUG();
+	}
+
+	return io_virt;
+}
+EXPORT_SYMBOL(__iop13xx_io);
+
 void * __iomem __iop13xx_ioremap(unsigned long cookie, size_t size,
 	unsigned long flags)
 {

arch/arm/mach-pxa/generic.c

@@ -76,7 +76,9 @@ unsigned long long sched_clock(void)
 	/*
 	 * 96-bit math to perform tick * NSEC_PER_SEC / CLOCK_TICK_RATE for
 	 * any value of CLOCK_TICK_RATE. Max value is in the 80 thousand
-	 * years range which is nice, but with higher computation cost.
+	 * years range and truncation to unsigned long long limits it to
+	 * sched_clock's max range of ~584 years.  This is nice but with
+	 * higher computation cost.
 	 */
 	{
 		union {

arch/arm/mach-pxa/time.c

@@ -101,7 +101,7 @@ static struct irqaction pxa_timer_irq = {
 	.handler	= pxa_timer_interrupt,
 };
 
-cycle_t pxa_get_cycles(void)
+static cycle_t pxa_get_cycles(void)
 {
 	return OSCR;
 }
@@ -134,13 +134,13 @@ static void __init pxa_timer_init(void)
 	OSMR0 = OSCR + LATCH;	/* set initial match */
 	local_irq_restore(flags);
 
-	/* on PXA OSCR runs continiously and is not written to, so we can use it
-	 * as clock source directly.
+	/*
+	 * OSCR runs continuously on PXA and is not written to,
+	 * so we can use it as clock source directly.
 	 */
 	clocksource_pxa.mult =
 		clocksource_hz2mult(CLOCK_TICK_RATE, clocksource_pxa.shift);
 	clocksource_register(&clocksource_pxa);
-
 }
 
 #ifdef CONFIG_NO_IDLE_HZ

arch/arm/mach-s3c2410/dma.c

@@ -1053,11 +1053,11 @@ int s3c2410_dma_config(dmach_t channel,
 	if (chan == NULL)
 		return -EINVAL;
 
-	printk("Initial dcon is %08x\n", dcon);
+	pr_debug("%s: Initial dcon is %08x\n", __FUNCTION__, dcon);
 
 	dcon |= chan->dcon & dma_sel.dcon_mask;
 
-	printk("New dcon is %08x\n", dcon);
+	pr_debug("%s: New dcon is %08x\n", __FUNCTION__, dcon);
 
 	switch (xferunit) {
 	case 1:

arch/arm/mm/copypage-v4mc.c

@@ -19,6 +19,7 @@
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
+#include <asm/cacheflush.h>
 
 #include "mm.h"
 
@@ -69,6 +70,11 @@ mc_copy_user_page(void *from, void *to)
 
 void v4_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
 {
+	struct page *page = virt_to_page(kfrom);
+
+	if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
+		__flush_dcache_page(page_mapping(page), page);
+
 	spin_lock(&minicache_lock);
 
 	set_pte_ext(TOP_PTE(0xffff8000), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0);

arch/arm/mm/copypage-v6.c

@@ -53,6 +53,10 @@ static void v6_copy_user_page_aliasing(void *kto, const void *kfrom, unsigned lo
 {
 	unsigned int offset = CACHE_COLOUR(vaddr);
 	unsigned long from, to;
+	struct page *page = virt_to_page(kfrom);
+
+	if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
+		__flush_dcache_page(page_mapping(page), page);
 
 	/*
 	 * Discard data in the kernel mapping for the new page.

arch/arm/mm/copypage-xscale.c

@@ -19,6 +19,7 @@
 #include <asm/page.h>
 #include <asm/pgtable.h>
 #include <asm/tlbflush.h>
+#include <asm/cacheflush.h>
 
 #include "mm.h"
 
@@ -91,6 +92,11 @@ mc_copy_user_page(void *from, void *to)
 
 void xscale_mc_copy_user_page(void *kto, const void *kfrom, unsigned long vaddr)
 {
+	struct page *page = virt_to_page(kfrom);
+
+	if (test_and_clear_bit(PG_dcache_dirty, &page->flags))
+		__flush_dcache_page(page_mapping(page), page);
+
 	spin_lock(&minicache_lock);
 
 	set_pte_ext(TOP_PTE(COPYPAGE_MINICACHE), pfn_pte(__pa(kfrom) >> PAGE_SHIFT, minicache_pgprot), 0);

arch/arm/vfp/vfpmodule.c

@@ -264,6 +264,18 @@ void VFP9_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
 		vfp_raise_exceptions(exceptions, trigger, orig_fpscr, regs);
 }
 
+static void vfp_enable(void *unused)
+{
+	u32 access = get_copro_access();
+
+	/*
+	 * Enable full access to VFP (cp10 and cp11)
+	 */
+	set_copro_access(access | CPACC_FULL(10) | CPACC_FULL(11));
+}
+
+#include <linux/smp.h>
+
 /*
  * VFP support code initialisation.
  */
@@ -288,6 +300,7 @@ static int __init vfp_init(void)
 	 * we just need to read the VFPSID register.
 	 */
 	vfpsid = fmrx(FPSID);
+	barrier();
 
 	printk(KERN_INFO "VFP support v0.3: ");
 	if (VFP_arch) {
@@ -301,6 +314,8 @@ static int __init vfp_init(void)
 	} else if (vfpsid & FPSID_NODOUBLE) {
 		printk("no double precision support\n");
 	} else {
+		smp_call_function(vfp_enable, NULL, 1, 1);
+
 		VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT;  /* Extract the architecture version */
 		printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
 			(vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,