Merge branch 'next/devel2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc
* 'next/devel2' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/linux-arm-soc: (47 commits) OMAP: Add debugfs node to show the summary of all clocks OMAP2+: hwmod: Follow the recommended PRCM module enable sequence OMAP2+: clock: allow per-SoC clock init code to prevent clockdomain calls from clock code OMAP2+: clockdomain: Add per clkdm lock to prevent concurrent state programming OMAP2+: PM: idle clkdms only if already in idle OMAP2+: clockdomain: add clkdm_in_hwsup() OMAP2+: clockdomain: Add 2 APIs to control clockdomain from hwmod framework OMAP: clockdomain: Remove redundant call to pwrdm_wait_transition() OMAP4: hwmod: Introduce the module control in hwmod control OMAP4: cm: Add two new APIs for modulemode control OMAP4: hwmod data: Add modulemode entry in omap_hwmod structure OMAP4: hwmod data: Add PRM context register offset OMAP4: prm: Remove deprecated functions OMAP4: prm: Replace warm reset API with the offset based version OMAP4: hwmod: Replace RSTCTRL absolute address with offset macros OMAP: hwmod: Wait the idle status to be disabled OMAP4: hwmod: Replace CLKCTRL absolute address with offset macros OMAP2+: hwmod: Init clkdm field at boot time OMAP4: hwmod data: Add clock domain attribute OMAP4: clock data: Add missing divider selection for auxclks ...
This commit is contained in:
Linus Torvalds
@@ -657,28 +657,41 @@ struct twl4030_power_data {
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extern void twl4030_power_init(struct twl4030_power_data *triton2_scripts);
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extern int twl4030_remove_script(u8 flags);
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struct twl4030_codec_audio_data {
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struct twl4030_codec_data {
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unsigned int digimic_delay; /* in ms */
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unsigned int ramp_delay_value;
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unsigned int offset_cncl_path;
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unsigned int check_defaults:1;
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unsigned int reset_registers:1;
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unsigned int hs_extmute:1;
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u16 hs_left_step;
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u16 hs_right_step;
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u16 hf_left_step;
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u16 hf_right_step;
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void (*set_hs_extmute)(int mute);
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};
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struct twl4030_codec_vibra_data {
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struct twl4030_vibra_data {
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unsigned int coexist;
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/* twl6040 */
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unsigned int vibldrv_res; /* left driver resistance */
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unsigned int vibrdrv_res; /* right driver resistance */
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unsigned int viblmotor_res; /* left motor resistance */
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unsigned int vibrmotor_res; /* right motor resistance */
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int vddvibl_uV; /* VDDVIBL volt, set 0 for fixed reg */
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int vddvibr_uV; /* VDDVIBR volt, set 0 for fixed reg */
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};
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struct twl4030_codec_data {
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struct twl4030_audio_data {
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unsigned int audio_mclk;
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struct twl4030_codec_audio_data *audio;
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struct twl4030_codec_vibra_data *vibra;
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struct twl4030_codec_data *codec;
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struct twl4030_vibra_data *vibra;
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/* twl6040 */
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int audpwron_gpio; /* audio power-on gpio */
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int naudint_irq; /* audio interrupt */
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unsigned int irq_base;
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};
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struct twl4030_platform_data {
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@@ -690,7 +703,7 @@ struct twl4030_platform_data {
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struct twl4030_keypad_data *keypad;
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struct twl4030_usb_data *usb;
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struct twl4030_power_data *power;
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struct twl4030_codec_data *codec;
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struct twl4030_audio_data *audio;
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/* Common LDO regulators for TWL4030/TWL6030 */
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struct regulator_init_data *vdac;
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@@ -1,5 +1,5 @@
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/*
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* MFD driver for twl4030 codec submodule
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* MFD driver for twl4030 audio submodule
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*
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* Author: Peter Ujfalusi <peter.ujfalusi@ti.com>
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*
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@@ -259,14 +259,14 @@
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#define TWL4030_VIBRA_DIR_SEL 0x20
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/* TWL4030 codec resource IDs */
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enum twl4030_codec_res {
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TWL4030_CODEC_RES_POWER = 0,
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TWL4030_CODEC_RES_APLL,
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TWL4030_CODEC_RES_MAX,
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enum twl4030_audio_res {
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TWL4030_AUDIO_RES_POWER = 0,
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TWL4030_AUDIO_RES_APLL,
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TWL4030_AUDIO_RES_MAX,
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};
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int twl4030_codec_disable_resource(enum twl4030_codec_res id);
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int twl4030_codec_enable_resource(enum twl4030_codec_res id);
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unsigned int twl4030_codec_get_mclk(void);
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int twl4030_audio_disable_resource(enum twl4030_audio_res id);
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int twl4030_audio_enable_resource(enum twl4030_audio_res id);
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unsigned int twl4030_audio_get_mclk(void);
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#endif /* End of __TWL4030_CODEC_H__ */
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228
include/linux/mfd/twl6040.h
Normal file
228
include/linux/mfd/twl6040.h
Normal file
@@ -0,0 +1,228 @@
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/*
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* MFD driver for twl6040
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*
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* Authors: Jorge Eduardo Candelaria <jorge.candelaria@ti.com>
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* Misael Lopez Cruz <misael.lopez@ti.com>
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*
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* Copyright: (C) 2011 Texas Instruments, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
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* 02110-1301 USA
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*
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*/
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#ifndef __TWL6040_CODEC_H__
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#define __TWL6040_CODEC_H__
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#include <linux/interrupt.h>
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#include <linux/mfd/core.h>
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#define TWL6040_REG_ASICID 0x01
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#define TWL6040_REG_ASICREV 0x02
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#define TWL6040_REG_INTID 0x03
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#define TWL6040_REG_INTMR 0x04
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#define TWL6040_REG_NCPCTL 0x05
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#define TWL6040_REG_LDOCTL 0x06
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#define TWL6040_REG_HPPLLCTL 0x07
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#define TWL6040_REG_LPPLLCTL 0x08
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#define TWL6040_REG_LPPLLDIV 0x09
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#define TWL6040_REG_AMICBCTL 0x0A
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#define TWL6040_REG_DMICBCTL 0x0B
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#define TWL6040_REG_MICLCTL 0x0C
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#define TWL6040_REG_MICRCTL 0x0D
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#define TWL6040_REG_MICGAIN 0x0E
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#define TWL6040_REG_LINEGAIN 0x0F
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#define TWL6040_REG_HSLCTL 0x10
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#define TWL6040_REG_HSRCTL 0x11
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#define TWL6040_REG_HSGAIN 0x12
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#define TWL6040_REG_EARCTL 0x13
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#define TWL6040_REG_HFLCTL 0x14
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#define TWL6040_REG_HFLGAIN 0x15
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#define TWL6040_REG_HFRCTL 0x16
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#define TWL6040_REG_HFRGAIN 0x17
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#define TWL6040_REG_VIBCTLL 0x18
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#define TWL6040_REG_VIBDATL 0x19
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#define TWL6040_REG_VIBCTLR 0x1A
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#define TWL6040_REG_VIBDATR 0x1B
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#define TWL6040_REG_HKCTL1 0x1C
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#define TWL6040_REG_HKCTL2 0x1D
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#define TWL6040_REG_GPOCTL 0x1E
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#define TWL6040_REG_ALB 0x1F
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#define TWL6040_REG_DLB 0x20
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#define TWL6040_REG_TRIM1 0x28
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#define TWL6040_REG_TRIM2 0x29
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#define TWL6040_REG_TRIM3 0x2A
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#define TWL6040_REG_HSOTRIM 0x2B
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#define TWL6040_REG_HFOTRIM 0x2C
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#define TWL6040_REG_ACCCTL 0x2D
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#define TWL6040_REG_STATUS 0x2E
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#define TWL6040_CACHEREGNUM (TWL6040_REG_STATUS + 1)
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#define TWL6040_VIOREGNUM 18
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#define TWL6040_VDDREGNUM 21
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/* INTID (0x03) fields */
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#define TWL6040_THINT 0x01
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#define TWL6040_PLUGINT 0x02
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#define TWL6040_UNPLUGINT 0x04
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#define TWL6040_HOOKINT 0x08
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#define TWL6040_HFINT 0x10
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#define TWL6040_VIBINT 0x20
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#define TWL6040_READYINT 0x40
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/* INTMR (0x04) fields */
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#define TWL6040_THMSK 0x01
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#define TWL6040_PLUGMSK 0x02
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#define TWL6040_HOOKMSK 0x08
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#define TWL6040_HFMSK 0x10
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#define TWL6040_VIBMSK 0x20
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#define TWL6040_READYMSK 0x40
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#define TWL6040_ALLINT_MSK 0x7B
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/* NCPCTL (0x05) fields */
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#define TWL6040_NCPENA 0x01
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#define TWL6040_NCPOPEN 0x40
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/* LDOCTL (0x06) fields */
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#define TWL6040_LSLDOENA 0x01
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#define TWL6040_HSLDOENA 0x04
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#define TWL6040_REFENA 0x40
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#define TWL6040_OSCENA 0x80
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/* HPPLLCTL (0x07) fields */
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#define TWL6040_HPLLENA 0x01
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#define TWL6040_HPLLRST 0x02
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#define TWL6040_HPLLBP 0x04
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#define TWL6040_HPLLSQRENA 0x08
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#define TWL6040_MCLK_12000KHZ (0 << 5)
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#define TWL6040_MCLK_19200KHZ (1 << 5)
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#define TWL6040_MCLK_26000KHZ (2 << 5)
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#define TWL6040_MCLK_38400KHZ (3 << 5)
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#define TWL6040_MCLK_MSK 0x60
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/* LPPLLCTL (0x08) fields */
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#define TWL6040_LPLLENA 0x01
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#define TWL6040_LPLLRST 0x02
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#define TWL6040_LPLLSEL 0x04
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#define TWL6040_LPLLFIN 0x08
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#define TWL6040_HPLLSEL 0x10
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/* HSLCTL (0x10) fields */
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#define TWL6040_HSDACMODEL 0x02
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#define TWL6040_HSDRVMODEL 0x08
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/* HSRCTL (0x11) fields */
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#define TWL6040_HSDACMODER 0x02
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#define TWL6040_HSDRVMODER 0x08
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/* VIBCTLL (0x18) fields */
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#define TWL6040_VIBENAL 0x01
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#define TWL6040_VIBCTRLL 0x04
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#define TWL6040_VIBCTRLLP 0x08
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#define TWL6040_VIBCTRLLN 0x10
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/* VIBDATL (0x19) fields */
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#define TWL6040_VIBDAT_MAX 0x64
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/* VIBCTLR (0x1A) fields */
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#define TWL6040_VIBENAR 0x01
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#define TWL6040_VIBCTRLR 0x04
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#define TWL6040_VIBCTRLRP 0x08
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#define TWL6040_VIBCTRLRN 0x10
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/* GPOCTL (0x1E) fields */
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#define TWL6040_GPO1 0x01
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#define TWL6040_GPO2 0x02
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#define TWL6040_GPO3 0x03
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/* ACCCTL (0x2D) fields */
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#define TWL6040_I2CSEL 0x01
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#define TWL6040_RESETSPLIT 0x04
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#define TWL6040_INTCLRMODE 0x08
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/* STATUS (0x2E) fields */
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#define TWL6040_PLUGCOMP 0x02
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#define TWL6040_VIBLOCDET 0x10
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#define TWL6040_VIBROCDET 0x20
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#define TWL6040_TSHUTDET 0x40
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#define TWL6040_CELLS 2
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#define TWL6040_REV_ES1_0 0x00
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#define TWL6040_REV_ES1_1 0x01
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#define TWL6040_REV_ES1_2 0x02
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#define TWL6040_IRQ_TH 0
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#define TWL6040_IRQ_PLUG 1
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#define TWL6040_IRQ_HOOK 2
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#define TWL6040_IRQ_HF 3
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#define TWL6040_IRQ_VIB 4
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#define TWL6040_IRQ_READY 5
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/* PLL selection */
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#define TWL6040_SYSCLK_SEL_LPPLL 0
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#define TWL6040_SYSCLK_SEL_HPPLL 1
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struct twl6040 {
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struct device *dev;
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struct mutex mutex;
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struct mutex io_mutex;
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struct mutex irq_mutex;
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struct mfd_cell cells[TWL6040_CELLS];
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struct completion ready;
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int audpwron;
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int power_count;
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int rev;
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int pll;
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unsigned int sysclk;
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unsigned int irq;
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unsigned int irq_base;
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u8 irq_masks_cur;
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u8 irq_masks_cache;
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};
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int twl6040_reg_read(struct twl6040 *twl6040, unsigned int reg);
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int twl6040_reg_write(struct twl6040 *twl6040, unsigned int reg,
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u8 val);
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int twl6040_set_bits(struct twl6040 *twl6040, unsigned int reg,
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u8 mask);
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int twl6040_clear_bits(struct twl6040 *twl6040, unsigned int reg,
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u8 mask);
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int twl6040_power(struct twl6040 *twl6040, int on);
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int twl6040_set_pll(struct twl6040 *twl6040, int pll_id,
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unsigned int freq_in, unsigned int freq_out);
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int twl6040_get_pll(struct twl6040 *twl6040);
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unsigned int twl6040_get_sysclk(struct twl6040 *twl6040);
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int twl6040_irq_init(struct twl6040 *twl6040);
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void twl6040_irq_exit(struct twl6040 *twl6040);
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#endif /* End of __TWL6040_CODEC_H__ */
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