xiaomi-sm8450/android_kernel_xiaomi_sm8450
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

Merge 5.10.53 into android12-5.10-lts

Browse Source 
Changes in 5.10.53
	ARM: dts: gemini: rename mdio to the right name
	ARM: dts: gemini: add device_type on pci
	ARM: dts: rockchip: Fix thermal sensor cells o rk322x
	ARM: dts: rockchip: fix pinctrl sleep nodename for rk3036-kylin and rk3288
	arm64: dts: rockchip: fix pinctrl sleep nodename for rk3399.dtsi
	ARM: dts: rockchip: Fix the timer clocks order
	ARM: dts: rockchip: Fix IOMMU nodes properties on rk322x
	ARM: dts: rockchip: Fix power-controller node names for rk3066a
	ARM: dts: rockchip: Fix power-controller node names for rk3188
	ARM: dts: rockchip: Fix power-controller node names for rk3288
	arm64: dts: rockchip: Fix power-controller node names for px30
	arm64: dts: rockchip: Fix power-controller node names for rk3328
	arm64: dts: rockchip: Fix power-controller node names for rk3399
	reset: ti-syscon: fix to_ti_syscon_reset_data macro
	ARM: brcmstb: dts: fix NAND nodes names
	ARM: Cygnus: dts: fix NAND nodes names
	ARM: NSP: dts: fix NAND nodes names
	ARM: dts: BCM63xx: Fix NAND nodes names
	ARM: dts: Hurricane 2: Fix NAND nodes names
	ARM: dts: imx6: phyFLEX: Fix UART hardware flow control
	ARM: imx: pm-imx5: Fix references to imx5_cpu_suspend_info
	arm64: dts: rockchip: fix regulator-gpio states array
	ARM: dts: ux500: Fix interrupt cells
	ARM: dts: ux500: Rename gpio-controller node
	ARM: dts: ux500: Fix orientation of accelerometer
	ARM: dts: imx6dl-riotboard: configure PHY clock and set proper EEE value
	rtc: mxc_v2: add missing MODULE_DEVICE_TABLE
	kbuild: sink stdout from cmd for silent build
	ARM: dts: am57xx-cl-som-am57x: fix ti,no-reset-on-init flag for gpios
	ARM: dts: am437x-gp-evm: fix ti,no-reset-on-init flag for gpios
	ARM: dts: am335x: fix ti,no-reset-on-init flag for gpios
	ARM: dts: OMAP2+: Replace underscores in sub-mailbox node names
	arm64: dts: ti: k3-am654x/j721e/j7200-common-proc-board: Fix MCU_RGMII1_TXC direction
	ARM: tegra: wm8903: Fix polarity of headphones-detection GPIO in device-trees
	ARM: tegra: nexus7: Correct 3v3 regulator GPIO of PM269 variant
	arm64: dts: qcom: sc7180: Move rmtfs memory region
	ARM: dts: stm32: Remove extra size-cells on dhcom-pdk2
	ARM: dts: stm32: Fix touchscreen node on dhcom-pdk2
	ARM: dts: stm32: fix stm32mp157c-odyssey card detect pin
	ARM: dts: stm32: fix gpio-keys node on STM32 MCU boards
	ARM: dts: stm32: fix RCC node name on stm32f429 MCU
	ARM: dts: stm32: fix timer nodes on STM32 MCU to prevent warnings
	memory: tegra: Fix compilation warnings on 64bit platforms
	firmware: arm_scmi: Add SMCCC discovery dependency in Kconfig
	firmware: arm_scmi: Fix the build when CONFIG_MAILBOX is not selected
	ARM: dts: bcm283x: Fix up MMC node names
	ARM: dts: bcm283x: Fix up GPIO LED node names
	arm64: dts: juno: Update SCPI nodes as per the YAML schema
	ARM: dts: rockchip: fix supply properties in io-domains nodes
	ARM: dts: stm32: fix i2c node name on stm32f746 to prevent warnings
	ARM: dts: stm32: move stmmac axi config in ethernet node on stm32mp15
	ARM: dts: stm32: fix the Odyssey SoM eMMC VQMMC supply
	ARM: dts: stm32: Drop unused linux,wakeup from touchscreen node on DHCOM SoM
	ARM: dts: stm32: Rename spi-flash/mx66l51235l@N to flash@N on DHCOM SoM
	ARM: dts: stm32: fix stpmic node for stm32mp1 boards
	ARM: OMAP2+: Block suspend for am3 and am4 if PM is not configured
	soc/tegra: fuse: Fix Tegra234-only builds
	firmware: tegra: bpmp: Fix Tegra234-only builds
	arm64: dts: ls208xa: remove bus-num from dspi node
	arm64: dts: imx8mq: assign PCIe clocks
	thermal/core: Correct function name thermal_zone_device_unregister()
	thermal/drivers/rcar_gen3_thermal: Do not shadow rcar_gen3_ths_tj_1
	thermal/drivers/imx_sc: Add missing of_node_put for loop iteration
	thermal/drivers/sprd: Add missing of_node_put for loop iteration
	kbuild: mkcompile_h: consider timestamp if KBUILD_BUILD_TIMESTAMP is set
	arch/arm64/boot/dts/marvell: fix NAND partitioning scheme
	rtc: max77686: Do not enforce (incorrect) interrupt trigger type
	scsi: aic7xxx: Fix unintentional sign extension issue on left shift of u8
	scsi: libsas: Add LUN number check in .slave_alloc callback
	scsi: libfc: Fix array index out of bound exception
	scsi: qedf: Add check to synchronize abort and flush
	sched/fair: Fix CFS bandwidth hrtimer expiry type
	perf/x86/intel/uncore: Clean up error handling path of iio mapping
	thermal/core/thermal_of: Stop zone device before unregistering it
	s390/traps: do not test MONITOR CALL without CONFIG_BUG
	s390: introduce proper type handling call_on_stack() macro
	cifs: prevent NULL deref in cifs_compose_mount_options()
	firmware: turris-mox-rwtm: add marvell,armada-3700-rwtm-firmware compatible string
	arm64: dts: marvell: armada-37xx: move firmware node to generic dtsi file
	Revert "swap: fix do_swap_page() race with swapoff"
	f2fs: Show casefolding support only when supported
	mm/thp: simplify copying of huge zero page pmd when fork
	mm/userfaultfd: fix uffd-wp special cases for fork()
	mm/page_alloc: fix memory map initialization for descending nodes
	usb: cdns3: Enable TDL_CHK only for OUT ep
	net: bcmgenet: ensure EXT_ENERGY_DET_MASK is clear
	net: dsa: mv88e6xxx: enable .port_set_policy() on Topaz
	net: dsa: mv88e6xxx: use correct .stats_set_histogram() on Topaz
	net: dsa: mv88e6xxx: enable .rmu_disable() on Topaz
	net: dsa: mv88e6xxx: enable devlink ATU hash param for Topaz
	net: ipv6: fix return value of ip6_skb_dst_mtu
	netfilter: ctnetlink: suspicious RCU usage in ctnetlink_dump_helpinfo
	net/sched: act_ct: fix err check for nf_conntrack_confirm
	vmxnet3: fix cksum offload issues for tunnels with non-default udp ports
	net/sched: act_ct: remove and free nf_table callbacks
	net: bridge: sync fdb to new unicast-filtering ports
	net: netdevsim: use xso.real_dev instead of xso.dev in callback functions of struct xfrmdev_ops
	net: bcmgenet: Ensure all TX/RX queues DMAs are disabled
	net: ip_tunnel: fix mtu calculation for ETHER tunnel devices
	net: moxa: fix UAF in moxart_mac_probe
	net: qcom/emac: fix UAF in emac_remove
	net: ti: fix UAF in tlan_remove_one
	net: send SYNACK packet with accepted fwmark
	net: validate lwtstate->data before returning from skb_tunnel_info()
	Revert "mm/shmem: fix shmem_swapin() race with swapoff"
	net: dsa: properly check for the bridge_leave methods in dsa_switch_bridge_leave()
	net: fddi: fix UAF in fza_probe
	dma-buf/sync_file: Don't leak fences on merge failure
	kbuild: do not suppress Kconfig prompts for silent build
	ARM: dts: aspeed: Fix AST2600 machines line names
	ARM: dts: tacoma: Add phase corrections for eMMC
	tcp: consistently disable header prediction for mptcp
	tcp: annotate data races around tp->mtu_info
	tcp: fix tcp_init_transfer() to not reset icsk_ca_initialized
	ipv6: tcp: drop silly ICMPv6 packet too big messages
	tcp: call sk_wmem_schedule before sk_mem_charge in zerocopy path
	tools: bpf: Fix error in 'make -C tools/ bpf_install'
	bpftool: Properly close va_list 'ap' by va_end() on error
	bpf: Track subprog poke descriptors correctly and fix use-after-free
	perf test bpf: Free obj_buf
	drm/panel: nt35510: Do not fail if DSI read fails
	udp: annotate data races around unix_sk(sk)->gso_size
	Linux 5.10.53

Signed-off-by: Greg Kroah-Hartman <gregkh@google.com>
Change-Id: Iac8fe9cd2abb2d8dd993967205a97c89f01f3647
This commit is contained in:
Greg Kroah-Hartman
2021-07-25 15:37:14 +02:00
parent 90a010f605 71046eac2d
commit afe9ed0e13
199 changed files with 819 additions and 565 deletions
Download Patch File Download Diff File Expand all files Collapse all files

11
Makefile
View File

@@ -1,7 +1,7 @@
# SPDX-License-Identifier: GPL-2.0 # SPDX-License-Identifier: GPL-2.0
VERSION = 5 VERSION = 5
PATCHLEVEL = 10 PATCHLEVEL = 10
SUBLEVEL = 52 SUBLEVEL = 53
EXTRAVERSION = EXTRAVERSION =
NAME = Dare mighty things NAME = Dare mighty things
@@ -720,11 +720,12 @@ $(KCONFIG_CONFIG):
# This exploits the 'multi-target pattern rule' trick. # This exploits the 'multi-target pattern rule' trick.
# The syncconfig should be executed only once to make all the targets. # The syncconfig should be executed only once to make all the targets.
# (Note: use the grouped target '&:' when we bump to GNU Make 4.3) # (Note: use the grouped target '&:' when we bump to GNU Make 4.3)
quiet_cmd_syncconfig = SYNC $@ #
cmd_syncconfig = $(MAKE) -f $(srctree)/Makefile syncconfig # Do not use $(call cmd,...) here. That would suppress prompts from syncconfig,
# so you cannot notice that Kconfig is waiting for the user input.
%/config/auto.conf %/config/auto.conf.cmd %/generated/autoconf.h: $(KCONFIG_CONFIG) %/config/auto.conf %/config/auto.conf.cmd %/generated/autoconf.h: $(KCONFIG_CONFIG)
+$(call cmd,syncconfig) $(Q)$(kecho) " SYNC $@"
$(Q)$(MAKE) -f $(srctree)/Makefile syncconfig
else # !may-sync-config else # !may-sync-config
# External modules and some install targets need include/generated/autoconf.h # External modules and some install targets need include/generated/autoconf.h
# and include/config/auto.conf but do not care if they are up-to-date. # and include/config/auto.conf but do not care if they are up-to-date.

4
arch/arm/boot/dts/am335x-baltos.dtsi
View File

@@ -393,10 +393,10 @@
status = "okay"; status = "okay";
}; };
&gpio0 { &gpio0_target {
ti,no-reset-on-init; ti,no-reset-on-init;
}; };
&gpio3 { &gpio3_target {
ti,no-reset-on-init; ti,no-reset-on-init;
}; };

2
arch/arm/boot/dts/am335x-evmsk.dts
View File

@@ -648,7 +648,7 @@
status = "okay"; status = "okay";
}; };
&gpio0 { &gpio0_target {
ti,no-reset-on-init; ti,no-reset-on-init;
}; };

2
arch/arm/boot/dts/am335x-moxa-uc-2100-common.dtsi
View File

@@ -150,7 +150,7 @@
status = "okay"; status = "okay";
}; };
&gpio0 { &gpio0_target {
ti,no-reset-on-init; ti,no-reset-on-init;
}; };

2
arch/arm/boot/dts/am335x-moxa-uc-8100-common.dtsi
View File

@@ -353,7 +353,7 @@
status = "okay"; status = "okay";
}; };
&gpio0 { &gpio0_target {
ti,no-reset-on-init; ti,no-reset-on-init;
}; };

2
arch/arm/boot/dts/am33xx-l4.dtsi
View File

@@ -1723,7 +1723,7 @@
}; };
}; };
target-module@ae000 { /* 0x481ae000, ap 56 3a.0 */ gpio3_target: target-module@ae000 { /* 0x481ae000, ap 56 3a.0 */
compatible = "ti,sysc-omap2", "ti,sysc"; compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0xae000 0x4>, reg = <0xae000 0x4>,
<0xae010 0x4>, <0xae010 0x4>,

5
arch/arm/boot/dts/am437x-gp-evm.dts
View File

@@ -813,11 +813,14 @@
status = "okay"; status = "okay";
}; };
&gpio5_target {
ti,no-reset-on-init;
};
&gpio5 { &gpio5 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&display_mux_pins>; pinctrl-0 = <&display_mux_pins>;
status = "okay"; status = "okay";
ti,no-reset-on-init;
p8 { p8 {
/* /*

2
arch/arm/boot/dts/am437x-l4.dtsi
View File

@@ -2033,7 +2033,7 @@
}; };
}; };
target-module@22000 { /* 0x48322000, ap 116 64.0 */ gpio5_target: target-module@22000 { /* 0x48322000, ap 116 64.0 */
compatible = "ti,sysc-omap2", "ti,sysc"; compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x22000 0x4>, reg = <0x22000 0x4>,
<0x22010 0x4>, <0x22010 0x4>,

13
arch/arm/boot/dts/am57xx-cl-som-am57x.dts
View File

@@ -454,20 +454,20 @@
&mailbox5 { &mailbox5 {
status = "okay"; status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
status = "okay"; status = "okay";
}; };
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
status = "okay"; status = "okay";
}; };
}; };
&mailbox6 { &mailbox6 {
status = "okay"; status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
status = "okay"; status = "okay";
}; };
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { mbox_dsp2_ipc3x: mbox-dsp2-ipc3x {
status = "okay"; status = "okay";
}; };
}; };
@@ -610,12 +610,11 @@
>; >;
}; };
&gpio3 { &gpio3_target {
status = "okay";
ti,no-reset-on-init; ti,no-reset-on-init;
}; };
&gpio2 { &gpio2_target {
status = "okay"; status = "okay";
ti,no-reset-on-init; ti,no-reset-on-init;
}; };

5
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
View File

@@ -156,10 +156,7 @@
/*W0-W7*/ "","","","","","","","", /*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","", /*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","","","","","","","", /*Y0-Y7*/ "","","","","","","","",
/*Z0-Z7*/ "","","","","","","","", /*Z0-Z7*/ "","","","","","","","";
/*AA0-AA7*/ "","","","","","","","",
/*AB0-AB7*/ "","","","","","","","",
/*AC0-AC7*/ "","","","","","","","";
pin_mclr_vpp { pin_mclr_vpp {
gpio-hog; gpio-hog;

6
arch/arm/boot/dts/aspeed-bmc-opp-tacoma.dts
View File

@@ -127,10 +127,7 @@
/*W0-W7*/ "","","","","","","","", /*W0-W7*/ "","","","","","","","",
/*X0-X7*/ "","","","","","","","", /*X0-X7*/ "","","","","","","","",
/*Y0-Y7*/ "","","","","","","","", /*Y0-Y7*/ "","","","","","","","",
/*Z0-Z7*/ "","","","","","","","", /*Z0-Z7*/ "","","","","","","","";
/*AA0-AA7*/ "","","","","","","","",
/*AB0-AB7*/ "","","","","","","","",
/*AC0-AC7*/ "","","","","","","","";
}; };
&fmc { &fmc {
@@ -180,6 +177,7 @@
&emmc { &emmc {
status = "okay"; status = "okay";
clk-phase-mmc-hs200 = <36>, <270>;
}; };
&fsim0 { &fsim0 {

2
arch/arm/boot/dts/bcm-cygnus.dtsi
View File

@@ -460,7 +460,7 @@
status = "disabled"; status = "disabled";
}; };
nand: nand@18046000 { nand_controller: nand-controller@18046000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x18046000 0x600>, <0xf8105408 0x600>, reg = <0x18046000 0x600>, <0xf8105408 0x600>,
<0x18046f00 0x20>; <0x18046f00 0x20>;

2
arch/arm/boot/dts/bcm-hr2.dtsi
View File

@@ -179,7 +179,7 @@
status = "disabled"; status = "disabled";
}; };
nand: nand@26000 { nand_controller: nand-controller@26000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x26000 0x600>, reg = <0x26000 0x600>,
<0x11b408 0x600>, <0x11b408 0x600>,

2
arch/arm/boot/dts/bcm-nsp.dtsi
View File

@@ -269,7 +269,7 @@
dma-coherent; dma-coherent;
}; };
nand: nand@26000 { nand_controller: nand-controller@26000 {
compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1"; compatible = "brcm,nand-iproc", "brcm,brcmnand-v6.1";
reg = <0x026000 0x600>, reg = <0x026000 0x600>,
<0x11b408 0x600>, <0x11b408 0x600>,

4
arch/arm/boot/dts/bcm2711-rpi-4-b.dts
View File

@@ -28,11 +28,11 @@
}; };
leds { leds {
act { led-act {
gpios = <&gpio 42 GPIO_ACTIVE_HIGH>; gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
}; };
pwr { led-pwr {
label = "PWR"; label = "PWR";
gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
default-state = "keep"; default-state = "keep";

2
arch/arm/boot/dts/bcm2711.dtsi
View File

@@ -395,7 +395,7 @@
ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>; ranges = <0x0 0x7e000000 0x0 0xfe000000 0x01800000>;
dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>; dma-ranges = <0x0 0xc0000000 0x0 0x00000000 0x40000000>;
emmc2: emmc2@7e340000 { emmc2: mmc@7e340000 {
compatible = "brcm,bcm2711-emmc2"; compatible = "brcm,bcm2711-emmc2";
reg = <0x0 0x7e340000 0x100>; reg = <0x0 0x7e340000 0x100>;
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;

4
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
View File

@@ -14,11 +14,11 @@
}; };
leds { leds {
act { led-act {
gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
}; };
pwr { led-pwr {
label = "PWR"; label = "PWR";
gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
default-state = "keep"; default-state = "keep";

2
arch/arm/boot/dts/bcm2835-rpi-a.dts
View File

@@ -14,7 +14,7 @@
}; };
leds { leds {
act { led-act {
gpios = <&gpio 16 GPIO_ACTIVE_LOW>; gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
}; };
}; };

4
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
View File

@@ -15,11 +15,11 @@
}; };
leds { leds {
act { led-act {
gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
}; };
pwr { led-pwr {
label = "PWR"; label = "PWR";
gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
default-state = "keep"; default-state = "keep";

2
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
View File

@@ -15,7 +15,7 @@
}; };
leds { leds {
act { led-act {
gpios = <&gpio 16 GPIO_ACTIVE_LOW>; gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
}; };
}; };

2
arch/arm/boot/dts/bcm2835-rpi-b.dts
View File

@@ -15,7 +15,7 @@
}; };
leds { leds {
act { led-act {
gpios = <&gpio 16 GPIO_ACTIVE_LOW>; gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
}; };
}; };

2
arch/arm/boot/dts/bcm2835-rpi-cm1.dtsi
View File

@@ -5,7 +5,7 @@
/ { / {
leds { leds {
act { led-act {
gpios = <&gpio 47 GPIO_ACTIVE_LOW>; gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
}; };
}; };

2
arch/arm/boot/dts/bcm2835-rpi-zero-w.dts
View File

@@ -23,7 +23,7 @@
}; };
leds { leds {
act { led-act {
gpios = <&gpio 47 GPIO_ACTIVE_LOW>; gpios = <&gpio 47 GPIO_ACTIVE_LOW>;
}; };
}; };

2
arch/arm/boot/dts/bcm2835-rpi-zero.dts
View File

@@ -18,7 +18,7 @@
}; };
leds { leds {
act { led-act {
gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
}; };
}; };

2
arch/arm/boot/dts/bcm2835-rpi.dtsi
View File

@@ -4,7 +4,7 @@
leds { leds {
compatible = "gpio-leds"; compatible = "gpio-leds";
act { led-act {
label = "ACT"; label = "ACT";
default-state = "keep"; default-state = "keep";
linux,default-trigger = "heartbeat"; linux,default-trigger = "heartbeat";

4
arch/arm/boot/dts/bcm2836-rpi-2-b.dts
View File

@@ -15,11 +15,11 @@
}; };
leds { leds {
act { led-act {
gpios = <&gpio 47 GPIO_ACTIVE_HIGH>; gpios = <&gpio 47 GPIO_ACTIVE_HIGH>;
}; };
pwr { led-pwr {
label = "PWR"; label = "PWR";
gpios = <&gpio 35 GPIO_ACTIVE_HIGH>; gpios = <&gpio 35 GPIO_ACTIVE_HIGH>;
default-state = "keep"; default-state = "keep";

4
arch/arm/boot/dts/bcm2837-rpi-3-a-plus.dts
View File

@@ -19,11 +19,11 @@
}; };
leds { leds {
act { led-act {
gpios = <&gpio 29 GPIO_ACTIVE_HIGH>; gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
}; };
pwr { led-pwr {
label = "PWR"; label = "PWR";
gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
default-state = "keep"; default-state = "keep";

4
arch/arm/boot/dts/bcm2837-rpi-3-b-plus.dts
View File

@@ -20,11 +20,11 @@
}; };
leds { leds {
act { led-act {
gpios = <&gpio 29 GPIO_ACTIVE_HIGH>; gpios = <&gpio 29 GPIO_ACTIVE_HIGH>;
}; };
pwr { led-pwr {
label = "PWR"; label = "PWR";
gpios = <&expgpio 2 GPIO_ACTIVE_LOW>; gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
default-state = "keep"; default-state = "keep";

2
arch/arm/boot/dts/bcm2837-rpi-3-b.dts
View File

@@ -20,7 +20,7 @@
}; };
leds { leds {
act { led-act {
gpios = <&expgpio 2 GPIO_ACTIVE_HIGH>; gpios = <&expgpio 2 GPIO_ACTIVE_HIGH>;
}; };
}; };

2
arch/arm/boot/dts/bcm2837-rpi-cm3.dtsi
View File

@@ -14,7 +14,7 @@
* Since there is no upstream GPIO driver yet, * Since there is no upstream GPIO driver yet,
* remove the incomplete node. * remove the incomplete node.
*/ */
/delete-node/ act; /delete-node/ led-act;
}; };
reg_3v3: fixed-regulator { reg_3v3: fixed-regulator {

2
arch/arm/boot/dts/bcm283x.dtsi
View File

@@ -420,7 +420,7 @@
status = "disabled"; status = "disabled";
}; };
sdhci: sdhci@7e300000 { sdhci: mmc@7e300000 {
compatible = "brcm,bcm2835-sdhci"; compatible = "brcm,bcm2835-sdhci";
reg = <0x7e300000 0x100>; reg = <0x7e300000 0x100>;
interrupts = <2 30>; interrupts = <2 30>;

2
arch/arm/boot/dts/bcm63138.dtsi
View File

@@ -203,7 +203,7 @@
status = "disabled"; status = "disabled";
}; };
nand: nand@2000 { nand_controller: nand-controller@2000 {
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand"; compatible = "brcm,nand-bcm63138", "brcm,brcmnand-v7.0", "brcm,brcmnand";

4
arch/arm/boot/dts/bcm7445-bcm97445svmb.dts
View File

@@ -14,10 +14,10 @@
}; };
}; };
&nand { &nand_controller {
status = "okay"; status = "okay";
nandcs@1 { nand@1 {
compatible = "brcm,nandcs"; compatible = "brcm,nandcs";
reg = <1>; reg = <1>;
nand-ecc-step-size = <512>; nand-ecc-step-size = <512>;

2
arch/arm/boot/dts/bcm7445.dtsi
View File

@@ -148,7 +148,7 @@
reg-names = "aon-ctrl", "aon-sram"; reg-names = "aon-ctrl", "aon-sram";
}; };
nand: nand@3e2800 { nand_controller: nand-controller@3e2800 {
status = "disabled"; status = "disabled";
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;

4
arch/arm/boot/dts/bcm911360_entphn.dts
View File

@@ -82,8 +82,8 @@
status = "okay"; status = "okay";
}; };
&nand { &nand_controller {
nandcs@1 { nand@1 {
compatible = "brcm,nandcs"; compatible = "brcm,nandcs";
reg = <0>; reg = <0>;
nand-on-flash-bbt; nand-on-flash-bbt;

4
arch/arm/boot/dts/bcm958300k.dts
View File

@@ -60,8 +60,8 @@
status = "okay"; status = "okay";
}; };
&nand { &nand_controller {
nandcs@1 { nand@1 {
compatible = "brcm,nandcs"; compatible = "brcm,nandcs";
reg = <0>; reg = <0>;
nand-on-flash-bbt; nand-on-flash-bbt;

4
arch/arm/boot/dts/bcm958305k.dts
View File

@@ -68,8 +68,8 @@
status = "okay"; status = "okay";
}; };
&nand { &nand_controller {
nandcs@1 { nand@1 {
compatible = "brcm,nandcs"; compatible = "brcm,nandcs";
reg = <0>; reg = <0>;
nand-on-flash-bbt; nand-on-flash-bbt;

4
arch/arm/boot/dts/bcm958522er.dts
View File

@@ -74,8 +74,8 @@
status = "okay"; status = "okay";
}; };
&nand { &nand_controller {
nandcs@0 { nand@0 {
compatible = "brcm,nandcs"; compatible = "brcm,nandcs";
reg = <0>; reg = <0>;
nand-on-flash-bbt; nand-on-flash-bbt;

4
arch/arm/boot/dts/bcm958525er.dts
View File

@@ -74,8 +74,8 @@
status = "okay"; status = "okay";
}; };
&nand { &nand_controller {
nandcs@0 { nand@0 {
compatible = "brcm,nandcs"; compatible = "brcm,nandcs";
reg = <0>; reg = <0>;
nand-on-flash-bbt; nand-on-flash-bbt;

4
arch/arm/boot/dts/bcm958525xmc.dts
View File

@@ -90,8 +90,8 @@
}; };
}; };
&nand { &nand_controller {
nandcs@0 { nand@0 {
compatible = "brcm,nandcs"; compatible = "brcm,nandcs";
reg = <0>; reg = <0>;
nand-on-flash-bbt; nand-on-flash-bbt;

4
arch/arm/boot/dts/bcm958622hr.dts
View File

@@ -78,8 +78,8 @@
status = "okay"; status = "okay";
}; };
&nand { &nand_controller {
nandcs@0 { nand@0 {
compatible = "brcm,nandcs"; compatible = "brcm,nandcs";
reg = <0>; reg = <0>;
nand-on-flash-bbt; nand-on-flash-bbt;

4
arch/arm/boot/dts/bcm958623hr.dts
View File

@@ -78,8 +78,8 @@
status = "okay"; status = "okay";
}; };
&nand { &nand_controller {
nandcs@0 { nand@0 {
compatible = "brcm,nandcs"; compatible = "brcm,nandcs";
reg = <0>; reg = <0>;
nand-on-flash-bbt; nand-on-flash-bbt;

4
arch/arm/boot/dts/bcm958625hr.dts
View File

@@ -89,8 +89,8 @@
status = "okay"; status = "okay";
}; };
&nand { &nand_controller {
nandcs@0 { nand@0 {
compatible = "brcm,nandcs"; compatible = "brcm,nandcs";
reg = <0>; reg = <0>;
nand-on-flash-bbt; nand-on-flash-bbt;

4
arch/arm/boot/dts/bcm958625k.dts
View File

@@ -68,8 +68,8 @@
status = "okay"; status = "okay";
}; };
&nand { &nand_controller {
nandcs@0 { nand@0 {
compatible = "brcm,nandcs"; compatible = "brcm,nandcs";
reg = <0>; reg = <0>;
nand-on-flash-bbt; nand-on-flash-bbt;

4
arch/arm/boot/dts/bcm963138dvt.dts
View File

@@ -31,10 +31,10 @@
status = "okay"; status = "okay";
}; };
&nand { &nand_controller {
status = "okay"; status = "okay";
nandcs@0 { nand@0 {
compatible = "brcm,nandcs"; compatible = "brcm,nandcs";
reg = <0>; reg = <0>;
nand-ecc-strength = <4>; nand-ecc-strength = <4>;

4
arch/arm/boot/dts/bcm988312hr.dts
View File

@@ -74,8 +74,8 @@
status = "okay"; status = "okay";
}; };
&nand { &nand_controller {
nandcs@0 { nand@0 {
compatible = "brcm,nandcs"; compatible = "brcm,nandcs";
reg = <0>; reg = <0>;
nand-on-flash-bbt; nand-on-flash-bbt;

2
arch/arm/boot/dts/dm816x.dtsi
View File

@@ -351,7 +351,7 @@
#mbox-cells = <1>; #mbox-cells = <1>;
ti,mbox-num-users = <4>; ti,mbox-num-users = <4>;
ti,mbox-num-fifos = <12>; ti,mbox-num-fifos = <12>;
mbox_dsp: mbox_dsp { mbox_dsp: mbox-dsp {
ti,mbox-tx = <3 0 0>; ti,mbox-tx = <3 0 0>;
ti,mbox-rx = <0 0 0>; ti,mbox-rx = <0 0 0>;
}; };

6
arch/arm/boot/dts/dra7-ipu-dsp-common.dtsi
View File

@@ -5,17 +5,17 @@
&mailbox5 { &mailbox5 {
status = "okay"; status = "okay";
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
status = "okay"; status = "okay";
}; };
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
status = "okay"; status = "okay";
}; };
}; };
&mailbox6 { &mailbox6 {
status = "okay"; status = "okay";
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
status = "okay"; status = "okay";
}; };
}; };

4
arch/arm/boot/dts/dra7-l4.dtsi
View File

@@ -1315,7 +1315,7 @@
}; };
}; };
target-module@55000 { /* 0x48055000, ap 13 0e.0 */ gpio2_target: target-module@55000 { /* 0x48055000, ap 13 0e.0 */
compatible = "ti,sysc-omap2", "ti,sysc"; compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x55000 0x4>, reg = <0x55000 0x4>,
<0x55010 0x4>, <0x55010 0x4>,
@@ -1348,7 +1348,7 @@
}; };
}; };
target-module@57000 { /* 0x48057000, ap 15 06.0 */ gpio3_target: target-module@57000 { /* 0x48057000, ap 15 06.0 */
compatible = "ti,sysc-omap2", "ti,sysc"; compatible = "ti,sysc-omap2", "ti,sysc";
reg = <0x57000 0x4>, reg = <0x57000 0x4>,
<0x57010 0x4>, <0x57010 0x4>,

6
arch/arm/boot/dts/dra72x.dtsi
View File

@@ -77,12 +77,12 @@
}; };
&mailbox5 { &mailbox5 {
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
ti,mbox-tx = <6 2 2>; ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>; ti,mbox-rx = <4 2 2>;
status = "disabled"; status = "disabled";
}; };
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
ti,mbox-tx = <5 2 2>; ti,mbox-tx = <5 2 2>;
ti,mbox-rx = <1 2 2>; ti,mbox-rx = <1 2 2>;
status = "disabled"; status = "disabled";
@@ -90,7 +90,7 @@
}; };
&mailbox6 { &mailbox6 {
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
ti,mbox-tx = <6 2 2>; ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>; ti,mbox-rx = <4 2 2>;
status = "disabled"; status = "disabled";

2
arch/arm/boot/dts/dra74-ipu-dsp-common.dtsi
View File

@@ -6,7 +6,7 @@
#include "dra7-ipu-dsp-common.dtsi" #include "dra7-ipu-dsp-common.dtsi"
&mailbox6 { &mailbox6 {
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { mbox_dsp2_ipc3x: mbox-dsp2-ipc3x {
status = "okay"; status = "okay";
}; };
}; };

8
arch/arm/boot/dts/dra74x.dtsi
View File

@@ -145,12 +145,12 @@
}; };
&mailbox5 { &mailbox5 {
mbox_ipu1_ipc3x: mbox_ipu1_ipc3x { mbox_ipu1_ipc3x: mbox-ipu1-ipc3x {
ti,mbox-tx = <6 2 2>; ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>; ti,mbox-rx = <4 2 2>;
status = "disabled"; status = "disabled";
}; };
mbox_dsp1_ipc3x: mbox_dsp1_ipc3x { mbox_dsp1_ipc3x: mbox-dsp1-ipc3x {
ti,mbox-tx = <5 2 2>; ti,mbox-tx = <5 2 2>;
ti,mbox-rx = <1 2 2>; ti,mbox-rx = <1 2 2>;
status = "disabled"; status = "disabled";
@@ -158,12 +158,12 @@
}; };
&mailbox6 { &mailbox6 {
mbox_ipu2_ipc3x: mbox_ipu2_ipc3x { mbox_ipu2_ipc3x: mbox-ipu2-ipc3x {
ti,mbox-tx = <6 2 2>; ti,mbox-tx = <6 2 2>;
ti,mbox-rx = <4 2 2>; ti,mbox-rx = <4 2 2>;
status = "disabled"; status = "disabled";
}; };
mbox_dsp2_ipc3x: mbox_dsp2_ipc3x { mbox_dsp2_ipc3x: mbox-dsp2-ipc3x {
ti,mbox-tx = <5 2 2>; ti,mbox-tx = <5 2 2>;
ti,mbox-rx = <1 2 2>; ti,mbox-rx = <1 2 2>;
status = "disabled"; status = "disabled";

2
arch/arm/boot/dts/gemini-dlink-dns-313.dts
View File

@@ -140,7 +140,7 @@
}; };
}; };
mdio0: ethernet-phy { mdio0: mdio {
compatible = "virtual,mdio-gpio"; compatible = "virtual,mdio-gpio";
/* Uses MDC and MDIO */ /* Uses MDC and MDIO */
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */

2
arch/arm/boot/dts/gemini-nas4220b.dts
View File

@@ -62,7 +62,7 @@
}; };
}; };
mdio0: ethernet-phy { mdio0: mdio {
compatible = "virtual,mdio-gpio"; compatible = "virtual,mdio-gpio";
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */

2
arch/arm/boot/dts/gemini-rut1xx.dts
View File

@@ -56,7 +56,7 @@
}; };
}; };
mdio0: ethernet-phy { mdio0: mdio {
compatible = "virtual,mdio-gpio"; compatible = "virtual,mdio-gpio";
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */

2
arch/arm/boot/dts/gemini-wbd111.dts
View File

@@ -68,7 +68,7 @@
}; };
}; };
mdio0: ethernet-phy { mdio0: mdio {
compatible = "virtual,mdio-gpio"; compatible = "virtual,mdio-gpio";
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */

2
arch/arm/boot/dts/gemini-wbd222.dts
View File

@@ -67,7 +67,7 @@
}; };
}; };
mdio0: ethernet-phy { mdio0: mdio {
compatible = "virtual,mdio-gpio"; compatible = "virtual,mdio-gpio";
gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */ gpios = <&gpio0 22 GPIO_ACTIVE_HIGH>, /* MDC */
<&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */ <&gpio0 21 GPIO_ACTIVE_HIGH>; /* MDIO */

1
arch/arm/boot/dts/gemini.dtsi
View File

@@ -286,6 +286,7 @@
clock-names = "PCLK", "PCICLK"; clock-names = "PCLK", "PCICLK";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pci_default_pins>; pinctrl-0 = <&pci_default_pins>;
device_type = "pci";
#address-cells = <3>; #address-cells = <3>;
#size-cells = <2>; #size-cells = <2>;
#interrupt-cells = <1>; #interrupt-cells = <1>;

2
arch/arm/boot/dts/imx6dl-riotboard.dts
View File

@@ -106,6 +106,8 @@
reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>; reset-gpios = <&gpio3 31 GPIO_ACTIVE_LOW>;
reset-assert-us = <10000>; reset-assert-us = <10000>;
reset-deassert-us = <1000>; reset-deassert-us = <1000>;
qca,smarteee-tw-us-1g = <24>;
qca,clk-out-frequency = <125000000>;
}; };
}; };
}; };

5
arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi
View File

@@ -315,8 +315,8 @@
fsl,pins = < fsl,pins = <
MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1 MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
MX6QDL_PAD_EIM_D30__UART3_RTS_B 0x1b0b1 MX6QDL_PAD_EIM_D31__UART3_RTS_B 0x1b0b1
MX6QDL_PAD_EIM_D31__UART3_CTS_B 0x1b0b1 MX6QDL_PAD_EIM_D30__UART3_CTS_B 0x1b0b1
>; >;
}; };
@@ -403,6 +403,7 @@
&uart3 { &uart3 {
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart3>; pinctrl-0 = <&pinctrl_uart3>;
uart-has-rtscts;
status = "disabled"; status = "disabled";
}; };

4
arch/arm/boot/dts/omap4-l4.dtsi
View File

@@ -597,11 +597,11 @@
#mbox-cells = <1>; #mbox-cells = <1>;
ti,mbox-num-users = <3>; ti,mbox-num-users = <3>;
ti,mbox-num-fifos = <8>; ti,mbox-num-fifos = <8>;
mbox_ipu: mbox_ipu { mbox_ipu: mbox-ipu {
ti,mbox-tx = <0 0 0>; ti,mbox-tx = <0 0 0>;
ti,mbox-rx = <1 0 0>; ti,mbox-rx = <1 0 0>;
}; };
mbox_dsp: mbox_dsp { mbox_dsp: mbox-dsp {
ti,mbox-tx = <3 0 0>; ti,mbox-tx = <3 0 0>;
ti,mbox-rx = <2 0 0>; ti,mbox-rx = <2 0 0>;
}; };

4
arch/arm/boot/dts/omap5-l4.dtsi
View File

@@ -613,11 +613,11 @@
#mbox-cells = <1>; #mbox-cells = <1>;
ti,mbox-num-users = <3>; ti,mbox-num-users = <3>;
ti,mbox-num-fifos = <8>; ti,mbox-num-fifos = <8>;
mbox_ipu: mbox_ipu { mbox_ipu: mbox-ipu {
ti,mbox-tx = <0 0 0>; ti,mbox-tx = <0 0 0>;
ti,mbox-rx = <1 0 0>; ti,mbox-rx = <1 0 0>;
}; };
mbox_dsp: mbox_dsp { mbox_dsp: mbox-dsp {
ti,mbox-tx = <3 0 0>; ti,mbox-tx = <3 0 0>;
ti,mbox-rx = <2 0 0>; ti,mbox-rx = <2 0 0>;
}; };

2
arch/arm/boot/dts/rk3036-kylin.dts
View File

@@ -390,7 +390,7 @@
}; };
}; };
sleep { suspend {
global_pwroff: global-pwroff { global_pwroff: global-pwroff {
rockchip,pins = <2 RK_PA7 1 &pcfg_pull_none>; rockchip,pins = <2 RK_PA7 1 &pcfg_pull_none>;
}; };

6
arch/arm/boot/dts/rk3066a.dtsi
View File

@@ -755,7 +755,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
pd_vio@RK3066_PD_VIO { power-domain@RK3066_PD_VIO {
reg = <RK3066_PD_VIO>; reg = <RK3066_PD_VIO>;
clocks = <&cru ACLK_LCDC0>, clocks = <&cru ACLK_LCDC0>,
<&cru ACLK_LCDC1>, <&cru ACLK_LCDC1>,
@@ -782,7 +782,7 @@
<&qos_rga>; <&qos_rga>;
}; };
pd_video@RK3066_PD_VIDEO { power-domain@RK3066_PD_VIDEO {
reg = <RK3066_PD_VIDEO>; reg = <RK3066_PD_VIDEO>;
clocks = <&cru ACLK_VDPU>, clocks = <&cru ACLK_VDPU>,
<&cru ACLK_VEPU>, <&cru ACLK_VEPU>,
@@ -791,7 +791,7 @@
pm_qos = <&qos_vpu>; pm_qos = <&qos_vpu>;
}; };
pd_gpu@RK3066_PD_GPU { power-domain@RK3066_PD_GPU {
reg = <RK3066_PD_GPU>; reg = <RK3066_PD_GPU>;
clocks = <&cru ACLK_GPU>; clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>; pm_qos = <&qos_gpu>;

14
arch/arm/boot/dts/rk3188.dtsi
View File

@@ -150,16 +150,16 @@
compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer";
reg = <0x2000e000 0x20>; reg = <0x2000e000 0x20>;
interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_TIMER3>, <&cru PCLK_TIMER3>; clocks = <&cru PCLK_TIMER3>, <&cru SCLK_TIMER3>;
clock-names = "timer", "pclk"; clock-names = "pclk", "timer";
}; };
timer6: timer@200380a0 { timer6: timer@200380a0 {
compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer"; compatible = "rockchip,rk3188-timer", "rockchip,rk3288-timer";
reg = <0x200380a0 0x20>; reg = <0x200380a0 0x20>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru SCLK_TIMER6>, <&cru PCLK_TIMER0>; clocks = <&cru PCLK_TIMER0>, <&cru SCLK_TIMER6>;
clock-names = "timer", "pclk"; clock-names = "pclk", "timer";
}; };
i2s0: i2s@1011a000 { i2s0: i2s@1011a000 {
@@ -699,7 +699,7 @@
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
pd_vio@RK3188_PD_VIO { power-domain@RK3188_PD_VIO {
reg = <RK3188_PD_VIO>; reg = <RK3188_PD_VIO>;
clocks = <&cru ACLK_LCDC0>, clocks = <&cru ACLK_LCDC0>,
<&cru ACLK_LCDC1>, <&cru ACLK_LCDC1>,
@@ -721,7 +721,7 @@
<&qos_rga>; <&qos_rga>;
}; };
pd_video@RK3188_PD_VIDEO { power-domain@RK3188_PD_VIDEO {
reg = <RK3188_PD_VIDEO>; reg = <RK3188_PD_VIDEO>;
clocks = <&cru ACLK_VDPU>, clocks = <&cru ACLK_VDPU>,
<&cru ACLK_VEPU>, <&cru ACLK_VEPU>,
@@ -730,7 +730,7 @@
pm_qos = <&qos_vpu>; pm_qos = <&qos_vpu>;
}; };
pd_gpu@RK3188_PD_GPU { power-domain@RK3188_PD_GPU {
reg = <RK3188_PD_GPU>; reg = <RK3188_PD_GPU>;
clocks = <&cru ACLK_GPU>; clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu>; pm_qos = <&qos_gpu>;

12
arch/arm/boot/dts/rk322x.dtsi
View File

@@ -524,7 +524,7 @@
pinctrl-0 = <&otp_pin>; pinctrl-0 = <&otp_pin>;
pinctrl-1 = <&otp_out>; pinctrl-1 = <&otp_out>;
pinctrl-2 = <&otp_pin>; pinctrl-2 = <&otp_pin>;
#thermal-sensor-cells = <0>; #thermal-sensor-cells = <1>;
rockchip,hw-tshut-temp = <95000>; rockchip,hw-tshut-temp = <95000>;
status = "disabled"; status = "disabled";
}; };
@@ -565,10 +565,9 @@
compatible = "rockchip,iommu"; compatible = "rockchip,iommu";
reg = <0x20020800 0x100>; reg = <0x20020800 0x100>;
interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vpu_mmu";
clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>; clocks = <&cru ACLK_VPU>, <&cru HCLK_VPU>;
clock-names = "aclk", "iface"; clock-names = "aclk", "iface";
iommu-cells = <0>; #iommu-cells = <0>;
status = "disabled"; status = "disabled";
}; };
@@ -576,10 +575,9 @@
compatible = "rockchip,iommu"; compatible = "rockchip,iommu";
reg = <0x20030480 0x40>, <0x200304c0 0x40>; reg = <0x20030480 0x40>, <0x200304c0 0x40>;
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vdec_mmu";
clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>; clocks = <&cru ACLK_RKVDEC>, <&cru HCLK_RKVDEC>;
clock-names = "aclk", "iface"; clock-names = "aclk", "iface";
iommu-cells = <0>; #iommu-cells = <0>;
status = "disabled"; status = "disabled";
}; };
@@ -609,7 +607,6 @@
compatible = "rockchip,iommu"; compatible = "rockchip,iommu";
reg = <0x20053f00 0x100>; reg = <0x20053f00 0x100>;
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "vop_mmu";
clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>; clocks = <&cru ACLK_VOP>, <&cru HCLK_VOP>;
clock-names = "aclk", "iface"; clock-names = "aclk", "iface";
#iommu-cells = <0>; #iommu-cells = <0>;
@@ -630,10 +627,9 @@
compatible = "rockchip,iommu"; compatible = "rockchip,iommu";
reg = <0x20070800 0x100>; reg = <0x20070800 0x100>;
interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "iep_mmu";
clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
clock-names = "aclk", "iface"; clock-names = "aclk", "iface";
iommu-cells = <0>; #iommu-cells = <0>;
status = "disabled"; status = "disabled";
}; };

2
arch/arm/boot/dts/rk3288-rock2-som.dtsi
View File

@@ -218,7 +218,7 @@
flash0-supply = <&vcc_flash>; flash0-supply = <&vcc_flash>;
flash1-supply = <&vccio_pmu>; flash1-supply = <&vccio_pmu>;
gpio30-supply = <&vccio_pmu>; gpio30-supply = <&vccio_pmu>;
gpio1830 = <&vcc_io>; gpio1830-supply = <&vcc_io>;
lcdc-supply = <&vcc_io>; lcdc-supply = <&vcc_io>;
sdcard-supply = <&vccio_sd>; sdcard-supply = <&vccio_sd>;
wifi-supply = <&vcc_18>; wifi-supply = <&vcc_18>;

4
arch/arm/boot/dts/rk3288-vyasa.dts
View File

@@ -379,10 +379,10 @@
audio-supply = <&vcc_18>; audio-supply = <&vcc_18>;
bb-supply = <&vcc_io>; bb-supply = <&vcc_io>;
dvp-supply = <&vcc_io>; dvp-supply = <&vcc_io>;
flash0-suuply = <&vcc_18>; flash0-supply = <&vcc_18>;
flash1-supply = <&vcc_lan>; flash1-supply = <&vcc_lan>;
gpio30-supply = <&vcc_io>; gpio30-supply = <&vcc_io>;
gpio1830 = <&vcc_io>; gpio1830-supply = <&vcc_io>;
lcdc-supply = <&vcc_io>; lcdc-supply = <&vcc_io>;
sdcard-supply = <&vccio_sd>; sdcard-supply = <&vccio_sd>;
wifi-supply = <&vcc_18>; wifi-supply = <&vcc_18>;

14
arch/arm/boot/dts/rk3288.dtsi
View File

@@ -240,8 +240,8 @@
compatible = "rockchip,rk3288-timer"; compatible = "rockchip,rk3288-timer";
reg = <0x0 0xff810000 0x0 0x20>; reg = <0x0 0xff810000 0x0 0x20>;
interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&xin24m>, <&cru PCLK_TIMER>; clocks = <&cru PCLK_TIMER>, <&xin24m>;
clock-names = "timer", "pclk"; clock-names = "pclk", "timer";
}; };
display-subsystem { display-subsystem {
@@ -788,7 +788,7 @@
* *_HDMI HDMI * *_HDMI HDMI
* *_MIPI_* MIPI * *_MIPI_* MIPI
*/ */
pd_vio@RK3288_PD_VIO { power-domain@RK3288_PD_VIO {
reg = <RK3288_PD_VIO>; reg = <RK3288_PD_VIO>;
clocks = <&cru ACLK_IEP>, clocks = <&cru ACLK_IEP>,
<&cru ACLK_ISP>, <&cru ACLK_ISP>,
@@ -830,7 +830,7 @@
* Note: The following 3 are HEVC(H.265) clocks, * Note: The following 3 are HEVC(H.265) clocks,
* and on the ACLK_HEVC_NIU (NOC). * and on the ACLK_HEVC_NIU (NOC).
*/ */
pd_hevc@RK3288_PD_HEVC { power-domain@RK3288_PD_HEVC {
reg = <RK3288_PD_HEVC>; reg = <RK3288_PD_HEVC>;
clocks = <&cru ACLK_HEVC>, clocks = <&cru ACLK_HEVC>,
<&cru SCLK_HEVC_CABAC>, <&cru SCLK_HEVC_CABAC>,
@@ -844,7 +844,7 @@
* (video endecoder & decoder) clocks that on the * (video endecoder & decoder) clocks that on the
* ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC). * ACLK_VCODEC_NIU and HCLK_VCODEC_NIU (NOC).
*/ */
pd_video@RK3288_PD_VIDEO { power-domain@RK3288_PD_VIDEO {
reg = <RK3288_PD_VIDEO>; reg = <RK3288_PD_VIDEO>;
clocks = <&cru ACLK_VCODEC>, clocks = <&cru ACLK_VCODEC>,
<&cru HCLK_VCODEC>; <&cru HCLK_VCODEC>;
@@ -855,7 +855,7 @@
* Note: ACLK_GPU is the GPU clock, * Note: ACLK_GPU is the GPU clock,
* and on the ACLK_GPU_NIU (NOC). * and on the ACLK_GPU_NIU (NOC).
*/ */
pd_gpu@RK3288_PD_GPU { power-domain@RK3288_PD_GPU {
reg = <RK3288_PD_GPU>; reg = <RK3288_PD_GPU>;
clocks = <&cru ACLK_GPU>; clocks = <&cru ACLK_GPU>;
pm_qos = <&qos_gpu_r>, pm_qos = <&qos_gpu_r>,
@@ -1593,7 +1593,7 @@
drive-strength = <12>; drive-strength = <12>;
}; };
sleep { suspend {
global_pwroff: global-pwroff { global_pwroff: global-pwroff {
rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>; rockchip,pins = <0 RK_PA0 1 &pcfg_pull_none>;
}; };

28
arch/arm/boot/dts/ste-ab8500.dtsi
View File

@@ -34,7 +34,7 @@
#clock-cells = <1>; #clock-cells = <1>;
}; };
ab8500_gpio: ab8500-gpio { ab8500_gpio: ab8500-gpiocontroller {
compatible = "stericsson,ab8500-gpio"; compatible = "stericsson,ab8500-gpio";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
@@ -42,15 +42,15 @@
ab8500-rtc { ab8500-rtc {
compatible = "stericsson,ab8500-rtc"; compatible = "stericsson,ab8500-rtc";
interrupts = <17 IRQ_TYPE_LEVEL_HIGH interrupts = <17 IRQ_TYPE_LEVEL_HIGH>,
18 IRQ_TYPE_LEVEL_HIGH>; <18 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "60S", "ALARM"; interrupt-names = "60S", "ALARM";
}; };
gpadc: ab8500-gpadc { gpadc: ab8500-gpadc {
compatible = "stericsson,ab8500-gpadc"; compatible = "stericsson,ab8500-gpadc";
interrupts = <32 IRQ_TYPE_LEVEL_HIGH interrupts = <32 IRQ_TYPE_LEVEL_HIGH>,
39 IRQ_TYPE_LEVEL_HIGH>; <39 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "HW_CONV_END", "SW_CONV_END"; interrupt-names = "HW_CONV_END", "SW_CONV_END";
vddadc-supply = <&ab8500_ldo_tvout_reg>; vddadc-supply = <&ab8500_ldo_tvout_reg>;
#address-cells = <1>; #address-cells = <1>;
@@ -169,13 +169,13 @@
ab8500_usb { ab8500_usb {
compatible = "stericsson,ab8500-usb"; compatible = "stericsson,ab8500-usb";
interrupts = < 90 IRQ_TYPE_LEVEL_HIGH interrupts = <90 IRQ_TYPE_LEVEL_HIGH>,
96 IRQ_TYPE_LEVEL_HIGH <96 IRQ_TYPE_LEVEL_HIGH>,
14 IRQ_TYPE_LEVEL_HIGH <14 IRQ_TYPE_LEVEL_HIGH>,
15 IRQ_TYPE_LEVEL_HIGH <15 IRQ_TYPE_LEVEL_HIGH>,
79 IRQ_TYPE_LEVEL_HIGH <79 IRQ_TYPE_LEVEL_HIGH>,
74 IRQ_TYPE_LEVEL_HIGH <74 IRQ_TYPE_LEVEL_HIGH>,
75 IRQ_TYPE_LEVEL_HIGH>; <75 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ID_WAKEUP_R", interrupt-names = "ID_WAKEUP_R",
"ID_WAKEUP_F", "ID_WAKEUP_F",
"VBUS_DET_F", "VBUS_DET_F",
@@ -192,8 +192,8 @@
ab8500-ponkey { ab8500-ponkey {
compatible = "stericsson,ab8500-poweron-key"; compatible = "stericsson,ab8500-poweron-key";
interrupts = <6 IRQ_TYPE_LEVEL_HIGH interrupts = <6 IRQ_TYPE_LEVEL_HIGH>,
7 IRQ_TYPE_LEVEL_HIGH>; <7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ONKEY_DBF", "ONKEY_DBR"; interrupt-names = "ONKEY_DBF", "ONKEY_DBR";
}; };

24
arch/arm/boot/dts/ste-ab8505.dtsi
View File

@@ -30,7 +30,7 @@
#clock-cells = <1>; #clock-cells = <1>;
}; };
ab8505_gpio: ab8505-gpio { ab8505_gpio: ab8505-gpiocontroller {
compatible = "stericsson,ab8505-gpio"; compatible = "stericsson,ab8505-gpio";
gpio-controller; gpio-controller;
#gpio-cells = <2>; #gpio-cells = <2>;
@@ -38,8 +38,8 @@
ab8500-rtc { ab8500-rtc {
compatible = "stericsson,ab8500-rtc"; compatible = "stericsson,ab8500-rtc";
interrupts = <17 IRQ_TYPE_LEVEL_HIGH interrupts = <17 IRQ_TYPE_LEVEL_HIGH>,
18 IRQ_TYPE_LEVEL_HIGH>; <18 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "60S", "ALARM"; interrupt-names = "60S", "ALARM";
}; };
@@ -131,13 +131,13 @@
ab8500_usb: ab8500_usb { ab8500_usb: ab8500_usb {
compatible = "stericsson,ab8500-usb"; compatible = "stericsson,ab8500-usb";
interrupts = < 90 IRQ_TYPE_LEVEL_HIGH interrupts = <90 IRQ_TYPE_LEVEL_HIGH>,
96 IRQ_TYPE_LEVEL_HIGH <96 IRQ_TYPE_LEVEL_HIGH>,
14 IRQ_TYPE_LEVEL_HIGH <14 IRQ_TYPE_LEVEL_HIGH>,
15 IRQ_TYPE_LEVEL_HIGH <15 IRQ_TYPE_LEVEL_HIGH>,
79 IRQ_TYPE_LEVEL_HIGH <79 IRQ_TYPE_LEVEL_HIGH>,
74 IRQ_TYPE_LEVEL_HIGH <74 IRQ_TYPE_LEVEL_HIGH>,
75 IRQ_TYPE_LEVEL_HIGH>; <75 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ID_WAKEUP_R", interrupt-names = "ID_WAKEUP_R",
"ID_WAKEUP_F", "ID_WAKEUP_F",
"VBUS_DET_F", "VBUS_DET_F",
@@ -154,8 +154,8 @@
ab8500-ponkey { ab8500-ponkey {
compatible = "stericsson,ab8500-poweron-key"; compatible = "stericsson,ab8500-poweron-key";
interrupts = <6 IRQ_TYPE_LEVEL_HIGH interrupts = <6 IRQ_TYPE_LEVEL_HIGH>,
7 IRQ_TYPE_LEVEL_HIGH>; <7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "ONKEY_DBF", "ONKEY_DBR"; interrupt-names = "ONKEY_DBF", "ONKEY_DBR";
}; };

2
arch/arm/boot/dts/ste-href-ab8500.dtsi
View File

@@ -9,7 +9,7 @@
soc { soc {
prcmu@80157000 { prcmu@80157000 {
ab8500 { ab8500 {
ab8500-gpio { ab8500-gpiocontroller {
/* Hog a few default settings */ /* Hog a few default settings */
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&gpio2_default_mode>, pinctrl-0 = <&gpio2_default_mode>,

3
arch/arm/boot/dts/ste-href-tvk1281618-r3.dtsi
View File

@@ -19,6 +19,9 @@
<19 IRQ_TYPE_EDGE_RISING>; <19 IRQ_TYPE_EDGE_RISING>;
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&accel_tvk_mode>; pinctrl-0 = <&accel_tvk_mode>;
mount-matrix = "0", "-1", "0",
"-1", "0", "0",
"0", "0", "-1";
}; };
magnetometer@1e { magnetometer@1e {
compatible = "st,lsm303dlm-magn"; compatible = "st,lsm303dlm-magn";

2
arch/arm/boot/dts/ste-href.dtsi
View File

@@ -224,7 +224,7 @@
prcmu@80157000 { prcmu@80157000 {
ab8500 { ab8500 {
ab8500-gpio { ab8500-gpiocontroller {
}; };
ab8500_usb { ab8500_usb {

2
arch/arm/boot/dts/ste-snowball.dts
View File

@@ -376,7 +376,7 @@
prcmu@80157000 { prcmu@80157000 {
ab8500 { ab8500 {
ab8500-gpio { ab8500-gpiocontroller {
/* /*
* AB8500 GPIOs are numbered starting from 1, so the first * AB8500 GPIOs are numbered starting from 1, so the first
* index 0 is what in the datasheet is called "GPIO1", and * index 0 is what in the datasheet is called "GPIO1", and

8
arch/arm/boot/dts/stm32429i-eval.dts
View File

@@ -119,17 +119,15 @@
}; };
}; };
gpio_keys { gpio-keys {
compatible = "gpio-keys"; compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat; autorepeat;
button@0 { button-0 {
label = "Wake up"; label = "Wake up";
linux,code = <KEY_WAKEUP>; linux,code = <KEY_WAKEUP>;
gpios = <&gpioa 0 0>; gpios = <&gpioa 0 0>;
}; };
button@1 { button-1 {
label = "Tamper"; label = "Tamper";
linux,code = <KEY_RESTART>; linux,code = <KEY_RESTART>;
gpios = <&gpioc 13 0>; gpios = <&gpioc 13 0>;

6
arch/arm/boot/dts/stm32746g-eval.dts
View File

@@ -81,12 +81,10 @@
}; };
}; };
gpio_keys { gpio-keys {
compatible = "gpio-keys"; compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat; autorepeat;
button@0 { button-0 {
label = "Wake up"; label = "Wake up";
linux,code = <KEY_WAKEUP>; linux,code = <KEY_WAKEUP>;
gpios = <&gpioc 13 0>; gpios = <&gpioc 13 0>;

6
arch/arm/boot/dts/stm32f429-disco.dts
View File

@@ -81,12 +81,10 @@
}; };
}; };
gpio_keys { gpio-keys {
compatible = "gpio-keys"; compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat; autorepeat;
button@0 { button-0 {
label = "User"; label = "User";
linux,code = <KEY_HOME>; linux,code = <KEY_HOME>;
gpios = <&gpioa 0 0>; gpios = <&gpioa 0 0>;

10
arch/arm/boot/dts/stm32f429.dtsi
View File

@@ -283,8 +283,6 @@
}; };
timers13: timers@40001c00 { timers13: timers@40001c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers"; compatible = "st,stm32-timers";
reg = <0x40001C00 0x400>; reg = <0x40001C00 0x400>;
clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>; clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM13)>;
@@ -299,8 +297,6 @@
}; };
timers14: timers@40002000 { timers14: timers@40002000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers"; compatible = "st,stm32-timers";
reg = <0x40002000 0x400>; reg = <0x40002000 0x400>;
clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>; clocks = <&rcc 0 STM32F4_APB1_CLOCK(TIM14)>;
@@ -633,8 +629,6 @@
}; };
timers10: timers@40014400 { timers10: timers@40014400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers"; compatible = "st,stm32-timers";
reg = <0x40014400 0x400>; reg = <0x40014400 0x400>;
clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>; clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM10)>;
@@ -649,8 +643,6 @@
}; };
timers11: timers@40014800 { timers11: timers@40014800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers"; compatible = "st,stm32-timers";
reg = <0x40014800 0x400>; reg = <0x40014800 0x400>;
clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>; clocks = <&rcc 0 STM32F4_APB2_CLOCK(TIM11)>;
@@ -709,7 +701,7 @@
status = "disabled"; status = "disabled";
}; };
rcc: rcc@40023810 { rcc: rcc@40023800 {
#reset-cells = <1>; #reset-cells = <1>;
#clock-cells = <2>; #clock-cells = <2>;
compatible = "st,stm32f42xx-rcc", "st,stm32-rcc"; compatible = "st,stm32f42xx-rcc", "st,stm32-rcc";

6
arch/arm/boot/dts/stm32f469-disco.dts
View File

@@ -104,12 +104,10 @@
}; };
}; };
gpio_keys { gpio-keys {
compatible = "gpio-keys"; compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat; autorepeat;
button@0 { button-0 {
label = "User"; label = "User";
linux,code = <KEY_WAKEUP>; linux,code = <KEY_WAKEUP>;
gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>; gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;

12
arch/arm/boot/dts/stm32f746.dtsi
View File

@@ -265,8 +265,6 @@
}; };
timers13: timers@40001c00 { timers13: timers@40001c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers"; compatible = "st,stm32-timers";
reg = <0x40001C00 0x400>; reg = <0x40001C00 0x400>;
clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>; clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM13)>;
@@ -281,8 +279,6 @@
}; };
timers14: timers@40002000 { timers14: timers@40002000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers"; compatible = "st,stm32-timers";
reg = <0x40002000 0x400>; reg = <0x40002000 0x400>;
clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>; clocks = <&rcc 0 STM32F7_APB1_CLOCK(TIM14)>;
@@ -364,9 +360,9 @@
status = "disabled"; status = "disabled";
}; };
i2c3: i2c@40005C00 { i2c3: i2c@40005c00 {
compatible = "st,stm32f7-i2c"; compatible = "st,stm32f7-i2c";
reg = <0x40005C00 0x400>; reg = <0x40005c00 0x400>;
interrupts = <72>, interrupts = <72>,
<73>; <73>;
resets = <&rcc STM32F7_APB1_RESET(I2C3)>; resets = <&rcc STM32F7_APB1_RESET(I2C3)>;
@@ -531,8 +527,6 @@
}; };
timers10: timers@40014400 { timers10: timers@40014400 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers"; compatible = "st,stm32-timers";
reg = <0x40014400 0x400>; reg = <0x40014400 0x400>;
clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>; clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM10)>;
@@ -547,8 +541,6 @@
}; };
timers11: timers@40014800 { timers11: timers@40014800 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-timers"; compatible = "st,stm32-timers";
reg = <0x40014800 0x400>; reg = <0x40014800 0x400>;
clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>; clocks = <&rcc 0 STM32F7_APB2_CLOCK(TIM11)>;

6
arch/arm/boot/dts/stm32f769-disco.dts
View File

@@ -75,12 +75,10 @@
}; };
}; };
gpio_keys { gpio-keys {
compatible = "gpio-keys"; compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
autorepeat; autorepeat;
button@0 { button-0 {
label = "User"; label = "User";
linux,code = <KEY_HOME>; linux,code = <KEY_HOME>;
gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>; gpios = <&gpioa 0 GPIO_ACTIVE_HIGH>;

4
arch/arm/boot/dts/stm32h743.dtsi
View File

@@ -454,8 +454,6 @@
}; };
lptimer4: timer@58002c00 { lptimer4: timer@58002c00 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-lptimer"; compatible = "st,stm32-lptimer";
reg = <0x58002c00 0x400>; reg = <0x58002c00 0x400>;
clocks = <&rcc LPTIM4_CK>; clocks = <&rcc LPTIM4_CK>;
@@ -470,8 +468,6 @@
}; };
lptimer5: timer@58003000 { lptimer5: timer@58003000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "st,stm32-lptimer"; compatible = "st,stm32-lptimer";
reg = <0x58003000 0x400>; reg = <0x58003000 0x400>;
clocks = <&rcc LPTIM5_CK>; clocks = <&rcc LPTIM5_CK>;

12
arch/arm/boot/dts/stm32mp151.dtsi
View File

@@ -1395,12 +1395,6 @@
status = "disabled"; status = "disabled";
}; };
stmmac_axi_config_0: stmmac-axi-config {
snps,wr_osr_lmt = <0x7>;
snps,rd_osr_lmt = <0x7>;
snps,blen = <0 0 0 0 16 8 4>;
};
ethernet0: ethernet@5800a000 { ethernet0: ethernet@5800a000 {
compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a"; compatible = "st,stm32mp1-dwmac", "snps,dwmac-4.20a";
reg = <0x5800a000 0x2000>; reg = <0x5800a000 0x2000>;
@@ -1424,6 +1418,12 @@
snps,axi-config = <&stmmac_axi_config_0>; snps,axi-config = <&stmmac_axi_config_0>;
snps,tso; snps,tso;
status = "disabled"; status = "disabled";
stmmac_axi_config_0: stmmac-axi-config {
snps,wr_osr_lmt = <0x7>;
snps,rd_osr_lmt = <0x7>;
snps,blen = <0 0 0 0 16 8 4>;
};
}; };
usbh_ohci: usbh-ohci@5800c000 { usbh_ohci: usbh-ohci@5800c000 {

7
arch/arm/boot/dts/stm32mp157a-stinger96.dtsi
View File

@@ -184,8 +184,6 @@
vdd_usb: ldo4 { vdd_usb: ldo4 {
regulator-name = "vdd_usb"; regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
interrupts = <IT_CURLIM_LDO4 0>; interrupts = <IT_CURLIM_LDO4 0>;
}; };
@@ -208,7 +206,6 @@
vref_ddr: vref_ddr { vref_ddr: vref_ddr {
regulator-name = "vref_ddr"; regulator-name = "vref_ddr";
regulator-always-on; regulator-always-on;
regulator-over-current-protection;
}; };
bst_out: boost { bst_out: boost {
@@ -219,13 +216,13 @@
vbus_otg: pwr_sw1 { vbus_otg: pwr_sw1 {
regulator-name = "vbus_otg"; regulator-name = "vbus_otg";
interrupts = <IT_OCP_OTG 0>; interrupts = <IT_OCP_OTG 0>;
regulator-active-discharge; regulator-active-discharge = <1>;
}; };
vbus_sw: pwr_sw2 { vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw"; regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>; interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge; regulator-active-discharge = <1>;
}; };
}; };

7
arch/arm/boot/dts/stm32mp157c-odyssey-som.dtsi
View File

@@ -173,8 +173,6 @@
vdd_usb: ldo4 { vdd_usb: ldo4 {
regulator-name = "vdd_usb"; regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
interrupts = <IT_CURLIM_LDO4 0>; interrupts = <IT_CURLIM_LDO4 0>;
}; };
@@ -197,7 +195,6 @@
vref_ddr: vref_ddr { vref_ddr: vref_ddr {
regulator-name = "vref_ddr"; regulator-name = "vref_ddr";
regulator-always-on; regulator-always-on;
regulator-over-current-protection;
}; };
bst_out: boost { bst_out: boost {
@@ -213,7 +210,7 @@
vbus_sw: pwr_sw2 { vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw"; regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>; interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge; regulator-active-discharge = <1>;
}; };
}; };
@@ -269,7 +266,7 @@
st,neg-edge; st,neg-edge;
bus-width = <8>; bus-width = <8>;
vmmc-supply = <&v3v3>; vmmc-supply = <&v3v3>;
vqmmc-supply = <&v3v3>; vqmmc-supply = <&vdd>;
mmc-ddr-3_3v; mmc-ddr-3_3v;
status = "okay"; status = "okay";
}; };

2
arch/arm/boot/dts/stm32mp157c-odyssey.dts
View File

@@ -64,7 +64,7 @@
pinctrl-0 = <&sdmmc1_b4_pins_a>; pinctrl-0 = <&sdmmc1_b4_pins_a>;
pinctrl-1 = <&sdmmc1_b4_od_pins_a>; pinctrl-1 = <&sdmmc1_b4_od_pins_a>;
pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>; pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
cd-gpios = <&gpiob 7 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; cd-gpios = <&gpioi 3 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
disable-wp; disable-wp;
st,neg-edge; st,neg-edge;
bus-width = <4>; bus-width = <4>;

7
arch/arm/boot/dts/stm32mp15xx-dhcom-pdk2.dtsi
View File

@@ -34,7 +34,6 @@
gpio-keys-polled { gpio-keys-polled {
compatible = "gpio-keys-polled"; compatible = "gpio-keys-polled";
#size-cells = <0>;
poll-interval = <20>; poll-interval = <20>;
/* /*
@@ -60,7 +59,6 @@
gpio-keys { gpio-keys {
compatible = "gpio-keys"; compatible = "gpio-keys";
#size-cells = <0>;
button-1 { button-1 {
label = "TA2-GPIO-B"; label = "TA2-GPIO-B";
@@ -184,12 +182,11 @@
}; };
polytouch@38 { touchscreen@38 {
compatible = "edt,edt-ft5x06"; compatible = "edt,edt-ft5406";
reg = <0x38>; reg = <0x38>;
interrupt-parent = <&gpiog>; interrupt-parent = <&gpiog>;
interrupts = <2 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */ interrupts = <2 IRQ_TYPE_EDGE_FALLING>; /* GPIO E */
linux,wakeup;
}; };
}; };

7
arch/arm/boot/dts/stm32mp15xx-dhcom-som.dtsi
View File

@@ -234,8 +234,6 @@
vdd_usb: ldo4 { vdd_usb: ldo4 {
regulator-name = "vdd_usb"; regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
interrupts = <IT_CURLIM_LDO4 0>; interrupts = <IT_CURLIM_LDO4 0>;
}; };
@@ -257,7 +255,6 @@
vref_ddr: vref_ddr { vref_ddr: vref_ddr {
regulator-name = "vref_ddr"; regulator-name = "vref_ddr";
regulator-always-on; regulator-always-on;
regulator-over-current-protection;
}; };
bst_out: boost { bst_out: boost {
@@ -273,7 +270,7 @@
vbus_sw: pwr_sw2 { vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw"; regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>; interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge; regulator-active-discharge = <1>;
}; };
}; };
@@ -338,7 +335,7 @@
#size-cells = <0>; #size-cells = <0>;
status = "okay"; status = "okay";
flash0: mx66l51235l@0 { flash0: flash@0 {
compatible = "jedec,spi-nor"; compatible = "jedec,spi-nor";
reg = <0>; reg = <0>;
spi-rx-bus-width = <4>; spi-rx-bus-width = <4>;

2
arch/arm/boot/dts/stm32mp15xx-dhcor-som.dtsi
View File

@@ -194,7 +194,7 @@
#size-cells = <0>; #size-cells = <0>;
status = "okay"; status = "okay";
flash0: spi-flash@0 { flash0: flash@0 {
compatible = "jedec,spi-nor"; compatible = "jedec,spi-nor";
reg = <0>; reg = <0>;
spi-rx-bus-width = <4>; spi-rx-bus-width = <4>;

7
arch/arm/boot/dts/stm32mp15xx-osd32.dtsi
View File

@@ -146,8 +146,6 @@
vdd_usb: ldo4 { vdd_usb: ldo4 {
regulator-name = "vdd_usb"; regulator-name = "vdd_usb";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
interrupts = <IT_CURLIM_LDO4 0>; interrupts = <IT_CURLIM_LDO4 0>;
}; };
@@ -171,7 +169,6 @@
vref_ddr: vref_ddr { vref_ddr: vref_ddr {
regulator-name = "vref_ddr"; regulator-name = "vref_ddr";
regulator-always-on; regulator-always-on;
regulator-over-current-protection;
}; };
bst_out: boost { bst_out: boost {
@@ -182,13 +179,13 @@
vbus_otg: pwr_sw1 { vbus_otg: pwr_sw1 {
regulator-name = "vbus_otg"; regulator-name = "vbus_otg";
interrupts = <IT_OCP_OTG 0>; interrupts = <IT_OCP_OTG 0>;
regulator-active-discharge; regulator-active-discharge = <1>;
}; };
vbus_sw: pwr_sw2 { vbus_sw: pwr_sw2 {
regulator-name = "vbus_sw"; regulator-name = "vbus_sw";
interrupts = <IT_OCP_SWOUT 0>; interrupts = <IT_OCP_SWOUT 0>;
regulator-active-discharge; regulator-active-discharge = <1>;
}; };
}; };

2
arch/arm/boot/dts/tegra20-acer-a500-picasso.dts
View File

@@ -1009,7 +1009,7 @@
nvidia,audio-codec = <&wm8903>; nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
nvidia,int-mic-en-gpios = <&wm8903 1 GPIO_ACTIVE_HIGH>; nvidia,int-mic-en-gpios = <&wm8903 1 GPIO_ACTIVE_HIGH>;
nvidia,headset; nvidia,headset;

2
arch/arm/boot/dts/tegra20-harmony.dts
View File

@@ -748,7 +748,7 @@
nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
GPIO_ACTIVE_HIGH>; GPIO_ACTIVE_LOW>;
nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0) nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
GPIO_ACTIVE_HIGH>; GPIO_ACTIVE_HIGH>;
nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1) nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)

2
arch/arm/boot/dts/tegra20-medcom-wide.dts
View File

@@ -84,7 +84,7 @@
nvidia,audio-codec = <&wm8903>; nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
clocks = <&tegra_car TEGRA20_CLK_PLL_A>, clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>, <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,

2
arch/arm/boot/dts/tegra20-plutux.dts
View File

@@ -52,7 +52,7 @@
nvidia,audio-codec = <&wm8903>; nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
clocks = <&tegra_car TEGRA20_CLK_PLL_A>, clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>, <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,

2
arch/arm/boot/dts/tegra20-seaboard.dts
View File

@@ -911,7 +911,7 @@
nvidia,audio-codec = <&wm8903>; nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_HIGH>; nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(X, 1) GPIO_ACTIVE_LOW>;
clocks = <&tegra_car TEGRA20_CLK_PLL_A>, clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>, <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,

2
arch/arm/boot/dts/tegra20-tec.dts
View File

@@ -61,7 +61,7 @@
nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
GPIO_ACTIVE_HIGH>; GPIO_ACTIVE_LOW>;
clocks = <&tegra_car TEGRA20_CLK_PLL_A>, clocks = <&tegra_car TEGRA20_CLK_PLL_A>,
<&tegra_car TEGRA20_CLK_PLL_A_OUT0>, <&tegra_car TEGRA20_CLK_PLL_A_OUT0>,

2
arch/arm/boot/dts/tegra20-ventana.dts
View File

@@ -686,7 +686,7 @@
nvidia,audio-codec = <&wm8903>; nvidia,audio-codec = <&wm8903>;
nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_LOW>;
nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0) nvidia,int-mic-en-gpios = <&gpio TEGRA_GPIO(X, 0)
GPIO_ACTIVE_HIGH>; GPIO_ACTIVE_HIGH>;
nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1) nvidia,ext-mic-en-gpios = <&gpio TEGRA_GPIO(X, 1)

2
arch/arm/boot/dts/tegra30-asus-nexus7-grouper-ti-pmic.dtsi
View File

@@ -143,7 +143,7 @@
}; };
vdd_3v3_sys: regulator@1 { vdd_3v3_sys: regulator@1 {
gpio = <&pmic 7 GPIO_ACTIVE_HIGH>; gpio = <&pmic 6 GPIO_ACTIVE_HIGH>;
enable-active-high; enable-active-high;
}; };
}; };

2
arch/arm/boot/dts/tegra30-cardhu.dtsi
View File

@@ -589,7 +589,7 @@
nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>; nvidia,spkr-en-gpios = <&wm8903 2 GPIO_ACTIVE_HIGH>;
nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2) nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(W, 2)
GPIO_ACTIVE_HIGH>; GPIO_ACTIVE_LOW>;
clocks = <&tegra_car TEGRA30_CLK_PLL_A>, clocks = <&tegra_car TEGRA30_CLK_PLL_A>,
<&tegra_car TEGRA30_CLK_PLL_A_OUT0>, <&tegra_car TEGRA30_CLK_PLL_A_OUT0>,

Some files were not shown because too many files have changed in this diff Show More