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[SCSI] isci: update afe (analog-front-end) recipe for C1

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C1 silicon requires updates to the phy tuning recipe and also support
for user provided cable selects (per-phy) for short, medium, and long
cables.  Default to 'short' awaiting support for selecting the cable via
oem parameters.

Reviewed-by: Jiangbi Liu <jiangbi.liu@intel.com>
Signed-off-by: Marcin Tomczak <marcin.tomczak@intel.com>
Signed-off-by: Jeff Skirvin <jeffrey.d.skirvin@intel.com>
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Signed-off-by: James Bottomley <JBottomley@Parallels.com>
This commit is contained in:
Jeff Skirvin
2012-01-04 01:32:39 -08:00
committed by James Bottomley
parent 2e5da889d4
commit afd13a1f2b
4 changed files with 108 additions and 31 deletions
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7
drivers/scsi/isci/phy.c
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@@ -186,8 +186,11 @@ sci_phy_link_layer_initialization(struct isci_phy *iphy,
writel(clksm_value, &llr->clock_skew_management);
/* @todo Provide a way to write this register correctly */
writel(0x02108421, &llr->afe_lookup_table_control);
if (is_c0(ihost->pdev) || is_c1(ihost->pdev)) {
writel(0x04210400, &llr->afe_lookup_table_control);
writel(0x020A7C05, &llr->sas_primitive_timeout);
} else
writel(0x02108421, &llr->afe_lookup_table_control);
llctl = SCU_SAS_LLCTL_GEN_VAL(NO_OUTBOUND_TASK_TIMEOUT,
(u8)ihost->user_parameters.no_outbound_task_timeout);