ath9k: Fix PLL powersave for AR9485
Use the value in ah->config.pll_pwrsave to determine which array needs to be loaded. Also, initialize pll_pwrsave to 1 by default. Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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Kalle Valo

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e519f78f11
commit
afa7e6dbd9
@@ -437,8 +437,14 @@ static void ath9k_init_pcoem_platform(struct ath_softc *sc)
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ath_info(common, "Enable WAR for ASPM D3/L1\n");
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}
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/*
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* The default value of pll_pwrsave is 1.
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* For certain AR9485 cards, it is set to 0.
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*/
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ah->config.pll_pwrsave = 1;
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if (sc->driver_data & ATH9K_PCI_NO_PLL_PWRSAVE) {
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ah->config.no_pll_pwrsave = true;
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ah->config.pll_pwrsave = 0;
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ath_info(common, "Disable PLL PowerSave\n");
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}
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