ath9k: Fix PLL powersave for AR9485

Use the value in ah->config.pll_pwrsave to determine
which array needs to be loaded. Also, initialize
pll_pwrsave to 1 by default.

Signed-off-by: Sujith Manoharan <c_manoha@qca.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
This commit is contained in:
Sujith Manoharan
2015-03-09 14:20:07 +05:30
committed by Kalle Valo
parent e519f78f11
commit afa7e6dbd9
3 changed files with 13 additions and 7 deletions

View File

@@ -437,8 +437,14 @@ static void ath9k_init_pcoem_platform(struct ath_softc *sc)
ath_info(common, "Enable WAR for ASPM D3/L1\n");
}
/*
* The default value of pll_pwrsave is 1.
* For certain AR9485 cards, it is set to 0.
*/
ah->config.pll_pwrsave = 1;
if (sc->driver_data & ATH9K_PCI_NO_PLL_PWRSAVE) {
ah->config.no_pll_pwrsave = true;
ah->config.pll_pwrsave = 0;
ath_info(common, "Disable PLL PowerSave\n");
}