tree-wide: fix assorted typos all over the place
That is "success", "unknown", "through", "performance", "[re|un]mapping" , "access", "default", "reasonable", "[con]currently", "temperature" , "channel", "[un]used", "application", "example","hierarchy", "therefore" , "[over|under]flow", "contiguous", "threshold", "enough" and others. Signed-off-by: André Goddard Rosa <andre.goddard@gmail.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
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Jiri Kosina

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@@ -204,7 +204,7 @@ static void mlx4_en_free_rx_desc(struct mlx4_en_priv *priv,
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en_dbg(DRV, priv, "Freeing fragment:%d\n", nr);
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dma = be64_to_cpu(rx_desc->data[nr].addr);
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en_dbg(DRV, priv, "Unmaping buffer at dma:0x%llx\n", (u64) dma);
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en_dbg(DRV, priv, "Unmapping buffer at dma:0x%llx\n", (u64) dma);
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pci_unmap_single(mdev->pdev, dma, skb_frags[nr].size,
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PCI_DMA_FROMDEVICE);
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put_page(skb_frags[nr].page);
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@@ -47,7 +47,7 @@ enum {
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static int inline_thold __read_mostly = MAX_INLINE;
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module_param_named(inline_thold, inline_thold, int, 0444);
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MODULE_PARM_DESC(inline_thold, "treshold for using inline data");
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MODULE_PARM_DESC(inline_thold, "threshold for using inline data");
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int mlx4_en_create_tx_ring(struct mlx4_en_priv *priv,
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struct mlx4_en_tx_ring *ring, u32 size,
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@@ -162,7 +162,7 @@ enum {
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#define MLX4_EN_DEF_RX_PAUSE 1
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#define MLX4_EN_DEF_TX_PAUSE 1
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/* Interval between sucessive polls in the Tx routine when polling is used
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/* Interval between successive polls in the Tx routine when polling is used
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instead of interrupts (in per-core Tx rings) - should be power of 2 */
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#define MLX4_EN_TX_POLL_MODER 16
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#define MLX4_EN_TX_POLL_TIMEOUT (HZ / 4)
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