Merge tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull ARM Devicetree updates from Olof Johansson:
 "We continue to see a lot of new material. I've highlighted some of it
  below, but there's been more beyond that as well.

  One of the sweeping changes is that many boards have seen their ARM
  Mali GPU devices added to device trees, since the DRM drivers have now
  been merged.

  So, with the caveat that I have surely missed several great
  contributions, here's a collection of the material this time around:

  New SoCs:

   - Mediatek mt8183 (4x Cortex-A73 + 4x Cortex-A53)

   - TI J721E (2x Cortex-A72 + 3x Cortex-R5F + 3 DSPs + MMA)

   - Amlogic G12B (4x Cortex-A73 + 2x Cortex-A53)

  New Boards / platforms:

   - Aspeed BMC support for a number of new server platforms

   - Kontron SMARC SoM (several i.MX6 versions)

   - Novtech's Meerkat96 (i.MX7)

   - ST Micro Avenger96 board

   - Hardkernel ODROID-N2 (Amlogic G12B)

   - Purism Librem5 devkit (i.MX8MQ)

   - Google Cheza (Qualcomm SDM845)

   - Qualcomm Dragonboard 845c (Qualcomm SDM845)

   - Hugsun X99 TV Box (Rockchip RK3399)

   - Khadas Edge/Edge-V/Captain (Rockchip RK3399)

  Updated / expanded boards and platforms:

   - Renesas r7s9210 has a lot of new peripherals added

   - Fixes and polish for Rockchip-based Chromebooks

   - Amlogic G12A has a lot of peripherals added

   - Nvidia Jetson Nano sees various fixes and improvements, and is now
     at feature parity with TX1"

* tag 'armsoc-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (586 commits)
  ARM: dts: gemini: Set DIR-685 SPI CS as active low
  ARM: dts: exynos: Adjust buck[78] regulators to supported values on Arndale Octa
  ARM: dts: exynos: Adjust buck[78] regulators to supported values on Odroid XU3 family
  ARM: dts: exynos: Move Mali400 GPU node to "/soc"
  ARM: dts: exynos: Fix imprecise abort on Mali GPU probe on Exynos4210
  arm64: dts: qcom: qcs404: Add missing space for cooling-cells property
  arm64: dts: rockchip: Fix USB3 Type-C on rk3399-sapphire
  arm64: dts: rockchip: Update DWC3 modules on RK3399 SoCs
  arm64: dts: rockchip: enable rk3328 watchdog clock
  ARM: dts: rockchip: add display nodes for rk322x
  ARM: dts: rockchip: fix vop iommu-cells on rk322x
  arm64: dts: rockchip: Add support for Hugsun X99 TV Box
  arm64: dts: rockchip: Define values for the IPA governor for rock960
  arm64: dts: rockchip: Fix multiple thermal zones conflict in rk3399.dtsi
  arm64: dts: rockchip: add core dtsi file for RK3399Pro SoCs
  arm64: dts: rockchip: improve rk3328-roc-cc rgmii performance.
  Revert "ARM: dts: rockchip: set PWM delay backlight settings for Minnie"
  ARM: dts: rockchip: Configure BT_DEV_WAKE in on rk3288-veyron
  arm64: dts: qcom: sdm845-cheza: add initial cheza dt
  ARM: dts: msm8974-FP2: Add vibration motor
  ...
This commit is contained in:
Linus Torvalds
2019-07-19 17:19:24 -07:00
445 changed files with 26687 additions and 2429 deletions

View File

@@ -586,6 +586,7 @@ dtb-$(CONFIG_SOC_IMX7D) += \
imx7d-colibri-emmc-eval-v3.dtb \
imx7d-colibri-eval-v3.dtb \
imx7d-mba7.dtb \
imx7d-meerkat96.dtb \
imx7d-nitrogen7.dtb \
imx7d-pico-hobbit.dtb \
imx7d-pico-pi.dtb \
@@ -602,6 +603,7 @@ dtb-$(CONFIG_SOC_IMX7ULP) += \
dtb-$(CONFIG_SOC_LS1021A) += \
ls1021a-moxa-uc-8410a.dtb \
ls1021a-qds.dtb \
ls1021a-tsn.dtb \
ls1021a-twr.dtb
dtb-$(CONFIG_SOC_VF610) += \
vf500-colibri-eval-v3.dtb \
@@ -748,6 +750,7 @@ dtb-$(CONFIG_SOC_AM33XX) += \
am335x-pepper.dtb \
am335x-phycore-rdk.dtb \
am335x-pocketbeagle.dtb \
am335x-regor-rdk.dtb \
am335x-sancloud-bbe.dtb \
am335x-shc.dtb \
am335x-sbc-t335.dtb \
@@ -975,6 +978,7 @@ dtb-$(CONFIG_ARCH_STM32) += \
stm32746g-eval.dtb \
stm32h743i-eval.dtb \
stm32h743i-disco.dtb \
stm32mp157a-avenger96.dtb \
stm32mp157a-dk1.dtb \
stm32mp157c-dk2.dtb \
stm32mp157c-ed1.dtb \
@@ -1268,10 +1272,16 @@ dtb-$(CONFIG_ARCH_ASPEED) += \
aspeed-bmc-arm-stardragon4800-rep2.dtb \
aspeed-bmc-facebook-cmm.dtb \
aspeed-bmc-facebook-tiogapass.dtb \
aspeed-bmc-facebook-yamp.dtb \
aspeed-bmc-intel-s2600wf.dtb \
aspeed-bmc-inspur-fp5280g2.dtb \
aspeed-bmc-lenovo-hr630.dtb \
aspeed-bmc-microsoft-olympus.dtb \
aspeed-bmc-opp-lanyang.dtb \
aspeed-bmc-opp-palmetto.dtb \
aspeed-bmc-opp-romulus.dtb \
aspeed-bmc-opp-swift.dtb \
aspeed-bmc-opp-vesnin.dtb \
aspeed-bmc-opp-witherspoon.dtb \
aspeed-bmc-opp-zaius.dtb \
aspeed-bmc-portwell-neptune.dtb \

View File

@@ -30,6 +30,12 @@
AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7) /* lcd_ac_bias_en.gpio2[25] RI */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT, MUX_MODE7) /* MMC1 CD */
>;
};
};
&uart1 {
@@ -65,7 +71,13 @@
};
&cpsw_emac1 {
phy-mode = "rgmii-txid";
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
phy-handle = <&phy1>;
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
};

View File

@@ -51,6 +51,12 @@
AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7) /* mcasp0_aclkr.gpio3[18], INPUT_PULLDOWN | MODE7 */
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT, MUX_MODE7) /* MMC1 CD */
>;
};
};
&uart1 {
@@ -107,7 +113,13 @@
};
&cpsw_emac1 {
phy-mode = "rgmii-txid";
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
phy-handle = <&phy1>;
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
};

View File

@@ -60,6 +60,11 @@
>;
};
mmc1_pins: pinmux_mmc1_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT, MUX_MODE7) /* MMC1 CD */
>;
};
};
&uart1 {
@@ -125,7 +130,7 @@
};
&cpsw_emac1 {
phy-mode = "rgmii-txid";
phy-mode = "rgmii-id";
dual_emac_res_vlan = <2>;
phy-handle = <&phy1>;
};
@@ -136,3 +141,9 @@
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio2 18 GPIO_ACTIVE_LOW>;
};

View File

@@ -36,15 +36,13 @@
pinctrl-names = "default";
pinctrl-0 = <&user_leds_pins>;
green {
label = "green:user";
user-led0 {
gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";
default-state = "on";
};
yellow {
label = "yellow:user";
user-led1 {
gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
linux,default-trigger = "gpio";
default-state = "on";
@@ -135,22 +133,6 @@
&davinci_mdio {
phy1: ethernet-phy@2 {
reg = <2>;
/* Register 260 (104h) RGMII Clock and Control Pad Skew */
rxc-skew-ps = <1400>;
rxdv-skew-ps = <0>;
txc-skew-ps = <1400>;
txen-skew-ps = <0>;
/* Register 261 (105h) RGMII RX Data Pad Skew */
rxd3-skew-ps = <0>;
rxd2-skew-ps = <0>;
rxd1-skew-ps = <0>;
rxd0-skew-ps = <0>;
/* Register 262 (106h) RGMII TX Data Pad Skew */
txd3-skew-ps = <0>;
txd2-skew-ps = <0>;
txd1-skew-ps = <0>;
txd0-skew-ps = <0>;
};
};

View File

@@ -10,6 +10,10 @@
#include "am335x-pcm-953.dtsi"
/* SoM */
&gpmc {
status = "okay";
};
&i2c_eeprom {
status = "okay";
};

View File

@@ -27,17 +27,13 @@
reg = <0x80000000 0x10000000>; /* 256 MB */
};
regulators {
compatible = "simple-bus";
vcc5v: fixedregulator0 {
compatible = "regulator-fixed";
regulator-name = "vcc5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
vcc5v: fixedregulator0 {
compatible = "regulator-fixed";
regulator-name = "vcc5v";
regulator-min-microvolt = <5000000>;
regulator-max-microvolt = <5000000>;
regulator-boot-on;
regulator-always-on;
};
};
@@ -50,6 +46,33 @@
status = "okay";
};
/* EMMC */
&am33xx_pinmux {
emmc_pins: pinmux_emmc_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn1.mmc1_clk */
AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2) /* gpmc_csn2.mmc1_cmd */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad0.mmc1_dat0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad1.mmc1_dat1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad2.mmc1_dat2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad3.mmc1_dat3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad4.mmc1_dat4 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad5.mmc1_dat5 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad6.mmc1_dat6 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1) /* gpmc_ad7.mmc1_dat7 */
>;
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&emmc_pins>;
vmmc-supply = <&vmmc_reg>;
bus-width = <8>;
ti,non-removable;
status = "disabled";
};
/* Ethernet */
&am33xx_pinmux {
ethernet0_pins: pinmux_ethernet0 {
@@ -164,7 +187,7 @@
};
&gpmc {
status = "okay";
status = "disabled";
pinctrl-names = "default";
pinctrl-0 = <&nandflash_pins>;
ranges = <0 0 0x08000000 0x1000000>; /* CS0: NAND */

View File

@@ -0,0 +1,24 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 Phytec Messtechnik GmbH
* Author: Teresa Remmet <t.remmet@phytec.de>
*
*/
/dts-v1/;
#include "am335x-phycore-som.dtsi"
#include "am335x-regor.dtsi"
/* SoM */
&gpmc {
status = "okay";
};
&i2c_eeprom {
status = "okay";
};
&serial_flash {
status = "okay";
};

View File

@@ -0,0 +1,223 @@
// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 Phytec Messtechnik GmbH
* Author: Teresa Remmet <t.remmet@phytec.de>
*
*/
/ {
model = "Phytec AM335x phyBOARD-REGOR";
compatible = "phytec,am335x-regor", "phytec,am335x-phycore-som", "ti,am33xx";
vcc3v3: fixedregulator@1 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
/* User IO */
user_leds: user_leds {
compatible = "gpio-leds";
pinctrl-names = "default";
pinctrl-0 = <&user_leds_pins>;
run_stop-led {
gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";
default-state = "off";
};
error-led {
gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
linux,default-trigger = "gpio";
default-state = "off";
};
};
};
/* User Leds */
&am33xx_pinmux {
user_leds_pins: pinmux_user_leds {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* lcd_hsync.gpio2_22 */
AM33XX_PADCONF(AM335X_PIN_MCASP0_FSX, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* mcasp0_fsx.gpio3_15 */
>;
};
};
/* CAN Busses */
&am33xx_pinmux {
dcan1_pins: pinmux_dcan1 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLUP, MUX_MODE2) /* uart0_ctsn.d_can1_tx */
AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE2) /* uart0_rtsn.d_can1_rx */
>;
};
};
&dcan1 {
pinctrl-names = "default";
pinctrl-0 = <&dcan1_pins>;
status = "okay";
};
/* Ethernet */
&am33xx_pinmux {
ethernet1_pins: pinmux_ethernet1 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT, MUX_MODE1) /* gpmc_a0.mii2_txen */
AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a1.mii2_rxdv */
AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT, MUX_MODE1) /* gpmc_a2.mii2_txd3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT, MUX_MODE1) /* gpmc_a3.mii2_txd2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT, MUX_MODE1) /* gpmc_a4.mii2_txd1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE1) /* gpmc_a5.mii2_txd0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a6.mii2_txclk */
AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a7.mii2_rxclk */
AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a8.mii2_rxd3 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a9.mii2_rxd2 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a10.mii2_rxd1 */
AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_a11.mii2_rxd0 */
AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_wpn.mii2_rxerr */
AM33XX_PADCONF(AM335X_PIN_GPMC_BEN1, PIN_INPUT_PULLDOWN, MUX_MODE1) /* gpmc_ben1.mii2_col */
>;
};
};
&cpsw_emac1 {
phy-handle = <&phy1>;
phy-mode = "mii";
dual_emac_res_vlan = <2>;
};
&davinci_mdio {
phy1: ethernet-phy@1 {
reg = <1>;
};
};
&mac {
slaves = <2>;
pinctrl-names = "default";
pinctrl-0 = <&ethernet0_pins &ethernet1_pins>;
dual_emac = <1>;
};
/* GPIOs */
&am33xx_pinmux {
pinctrl-names = "default";
pinctrl-0 = <&user_gpios_pins>;
user_gpios_pins: pinmux_user_gpios {
pinctrl-single,pins = <
/* DIGIN 1-4 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT, MUX_MODE7) /* gpmc_ad11.gpio0_27 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT, MUX_MODE7) /* gpmc_ad10.gpio0_26 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT, MUX_MODE7) /* gpmc_ad9.gpio0_23 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT, MUX_MODE7) /* gpmc_ad8.gpio0_22 */
/* DIGOUT 1-4 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad15.gpio1_15 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad14.gpio1_14 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad13.gpio1_13 */
AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_OUTPUT, MUX_MODE7) /* gpmc_ad12.gpio1_12 */
>;
};
};
/* MMC */
&am33xx_pinmux {
mmc1_pins: pinmux_mmc1 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE7) /* spi0_cs1.mmc0_sdcd */
>;
};
};
&mmc1 {
vmmc-supply = <&vcc3v3>;
bus-width = <4>;
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pins>;
cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
status = "okay";
};
/* RTC */
&i2c_rtc {
status = "okay";
};
/* UARTs */
&am33xx_pinmux {
uart0_pins: pinmux_uart0 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
>;
};
uart2_pins: pinmux_uart2 {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_tx_clk.uart2_rxd */
AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_rx_clk.uart2_txd */
>;
};
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins>;
status = "okay";
};
&uart2 {
pinctrl-names = "default";
pinctrl-0 = <&uart2_pins>;
status = "okay";
};
/* RS485 - UART1 */
&am33xx_pinmux {
uart1_rs485_pins: pinmux_uart1_rs485_pins {
pinctrl-single,pins = <
AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLUP, MUX_MODE0)
>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&uart1_rs485_pins>;
status = "okay";
linux,rs485-enabled-at-boot-time;
};
/* USB */
&cppi41dma {
status = "okay";
};
&usb_ctrl_mod {
status = "okay";
};
&usb {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb0_phy {
status = "okay";
};

View File

@@ -10,6 +10,10 @@
#include "am335x-wega.dtsi"
/* SoM */
&gpmc {
status = "okay";
};
&i2c_eeprom {
status = "okay";
};

View File

@@ -12,16 +12,12 @@
compatible = "ti,da830-evm-audio";
};
regulators {
compatible = "simple-bus";
vcc3v3: fixedregulator1 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
vcc3v3: fixedregulator1 {
compatible = "regulator-fixed";
regulator-name = "vcc3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
};

View File

@@ -119,6 +119,9 @@
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x40000000 0x04000000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
flash1@44000000 {
@@ -126,6 +129,9 @@
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x44000000 0x04000000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
/* SMSC LAN91C111 ethernet with PHY and EEPROM */

View File

@@ -120,12 +120,18 @@
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x30000000 0x4000000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
fpga_flash@38000000 {
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x38000000 0x800000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
/*

View File

@@ -235,6 +235,9 @@
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x40000000 0x04000000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
flash1@44000000 {
@@ -242,6 +245,9 @@
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x44000000 0x04000000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
bridge {

View File

@@ -134,6 +134,9 @@
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x40000000 0x04000000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
flash1@44000000 {
@@ -141,6 +144,9 @@
compatible = "arm,versatile-flash", "cfi-flash";
reg = <0x44000000 0x04000000>;
bank-width = <4>;
partitions {
compatible = "arm,arm-firmware-suite";
};
};
/* SMSC 9118 ethernet with PHY and EEPROM */

View File

@@ -143,6 +143,20 @@
};
};
auxdisplay {
compatible = "hit,hd44780";
data-gpios = <&gpio1 25 GPIO_ACTIVE_HIGH>,
<&gpio1 26 GPIO_ACTIVE_HIGH>,
<&gpio1 27 GPIO_ACTIVE_HIGH>,
<&gpio1 29 GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
rs-gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
rw-gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
backlight-gpios = <&gpio1 21 GPIO_ACTIVE_LOW>;
display-height-chars = <2>;
display-width-chars = <16>;
};
gpio-keys {
compatible = "gpio-keys";
pinctrl-0 = <&backup_button_pin

View File

@@ -372,3 +372,11 @@
&adc {
status = "okay";
};
&ehci0 {
status = "okay";
};
&ehci1 {
status = "okay";
};

View File

@@ -0,0 +1,160 @@
// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2018 Facebook Inc.
/dts-v1/;
#include "aspeed-g5.dtsi"
/ {
model = "Facebook YAMP 100 BMC";
compatible = "facebook,yamp-bmc", "aspeed,ast2500";
aliases {
/*
* Override the default uart aliases to avoid breaking
* the legacy applications.
*/
serial0 = &uart5;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS0,9600n8 root=/dev/ram rw";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
/*
* Update reset type to "system" (full chip) to fix warm reboot hang issue
* when reset type is set to default ("soc", gated by reset mask registers).
*/
&wdt1 {
status = "okay";
aspeed,reset-type = "system";
};
/*
* wdt2 is not used by Yamp.
*/
&wdt2 {
status = "disabled";
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "facebook-bmc-flash-layout.dtsi"
};
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart2 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default
&pinctrl_rxd2_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default>;
};
&uart5 {
status = "okay";
};
&mac0 {
status = "okay";
use-ncsi;
no-hw-checksum;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
};
&i2c2 {
status = "okay";
i2c-switch@75 {
compatible = "nxp,pca9548";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x75>;
};
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
};
&i2c7 {
status = "okay";
};
&i2c8 {
status = "okay";
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
};
&i2c12 {
status = "okay";
};
&i2c13 {
status = "okay";
};
&vhub {
status = "okay";
};

View File

@@ -0,0 +1,846 @@
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/leds/leds-pca955x.h>
/ {
model = "FP5280G2 BMC";
compatible = "inspur,fp5280g2-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vga_memory: framebuffer@9f000000 {
no-map;
reg = <0x9f000000 0x01000000>; /* 16M */
};
flash_memory: region@98000000 {
no-map;
reg = <0x98000000 0x04000000>; /* 64M */
};
coldfire_memory: codefire_memory@9ef00000 {
reg = <0x9ef00000 0x00100000>;
no-map;
};
gfx_memory: framebuffer {
size = <0x01000000>;
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
video_engine_memory: jpegbuffer {
size = <0x02000000>; /* 32M */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
fsi: gpio-fsi {
compatible = "aspeed,ast2500-cf-fsi-master", "fsi-master";
#address-cells = <2>;
#size-cells = <0>;
no-gpio-delays;
memory-region = <&coldfire_memory>;
aspeed,sram = <&sram>;
aspeed,cvic = <&cvic>;
clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
data-gpios = <&gpio ASPEED_GPIO(AA, 2) GPIO_ACTIVE_HIGH>;
mux-gpios = <&gpio ASPEED_GPIO(I, 2) GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
trans-gpios = <&gpio ASPEED_GPIO(R, 2) GPIO_ACTIVE_HIGH>;
};
gpio-keys {
compatible = "gpio-keys";
checkstop {
label = "checkstop";
gpios = <&gpio ASPEED_GPIO(B, 3) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(B, 3)>;
};
ps0-presence {
label = "ps0-presence";
gpios = <&gpio ASPEED_GPIO(F, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 0)>;
};
ps1-presence {
label = "ps1-presence";
gpios = <&gpio ASPEED_GPIO(F, 1) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(F, 1)>;
};
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <1000>;
fan0-presence {
label = "fan0-presence";
gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
linux,code = <1>;
};
fan1-presence {
label = "fan1-presence";
gpios = <&pca1 1 GPIO_ACTIVE_LOW>;
linux,code = <2>;
};
fan2-presence {
label = "fan2-presence";
gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
linux,code = <3>;
};
fan3-presence {
label = "fan3-presence";
gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
linux,code = <4>;
};
fan4-presence {
label = "fan4-presence";
gpios = <&pca1 4 GPIO_ACTIVE_LOW>;
linux,code = <5>;
};
fan5-presence {
label = "fan5-presence";
gpios = <&pca1 5 GPIO_ACTIVE_LOW>;
linux,code = <6>;
};
fan6-presence {
label = "fan6-presence";
gpios = <&pca1 6 GPIO_ACTIVE_LOW>;
linux,code = <7>;
};
fan7-presence {
label = "fan7-presence";
gpios = <&pca1 7 GPIO_ACTIVE_LOW>;
linux,code = <8>;
};
};
leds {
compatible = "gpio-leds";
power {
label = "power";
/* TODO: dummy gpio */
gpios = <&gpio ASPEED_GPIO(R, 1) GPIO_ACTIVE_LOW>;
};
};
iio-hwmon-battery {
compatible = "iio-hwmon";
io-channels = <&adc 15>;
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>, <&adc 4>,
<&adc 5>, <&adc 6>, <&adc 7>, <&adc 8>, <&adc 9>,
<&adc 10>, <&adc 11>, <&adc 12>, <&adc 13>, <&adc 14>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
label = "bmc";
m25p,fast-read;
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout.dtsi"
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
label = "pnor";
m25p,fast-read;
spi-max-frequency = <100000000>;
};
};
&uart1 {
/* Rear RS-232 connector */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default
&pinctrl_nrts1_default
&pinctrl_ndtr1_default
&pinctrl_ndsr1_default
&pinctrl_ncts1_default
&pinctrl_ndcd1_default
&pinctrl_nri1_default>;
};
&uart2 {
/* Test Point */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
};
&uart3 {
/* APSS */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
};
&uart5 {
status = "okay";
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi1>;
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
use-ncsi;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&i2c0 {
/* LCD */
status = "okay";
};
&i2c1 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
label = "fru";
};
};
&i2c2 {
status = "okay";
tmp112@48 {
compatible = "ti,tmp112";
reg = <0x48>;
label = "inlet";
};
tmp112@49 {
compatible = "ti,tmp112";
reg = <0x49>;
label = "outlet";
};
i2c-switch@70 {
compatible = "nxp,pca9546";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
tmp112@4a {
compatible = "ti,tmp112";
reg = <0x4a>;
label = "psu_inlet";
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tmp112@4a {
compatible = "ti,tmp112";
reg = <0x4a>;
label = "ocp_zone";
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
tmp112@4a {
compatible = "ti,tmp112";
reg = <0x4a>;
label = "bmc_zone";
};
};
i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
tmp112@7c {
compatible = "microchip,emc1413";
reg = <0x7c>;
};
};
};
};
&i2c3 {
/* Riser Card */
status = "okay";
};
&i2c4 {
status = "okay";
rtc@68 {
compatible = "dallas,ds3232";
reg = <0x68>;
};
};
&i2c5 {
/* vr */
status = "okay";
};
&i2c6 {
/* bp card */
status = "okay";
};
&i2c7 {
status = "okay";
i2c-switch@70 {
compatible = "nxp,pca9546";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
adm1278@10 {
compatible = "adi,adm1278";
reg = <0x10>;
};
adm1278@13 {
compatible = "adi,adm1278";
reg = <0x13>;
};
adm1278@50 {
compatible = "adi,adm1278";
reg = <0x50>;
};
adm1278@53 {
compatible = "adi,adm1278";
reg = <0x53>;
};
};
/*pcie riser*/
};
};
&i2c8 {
status = "okay";
pca0: pca9555@20 {
compatible = "nxp,pca9555";
reg = <0x20>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca1: pca9555@21 {
compatible = "nxp,pca9555";
reg = <0x21>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca2: pca9555@22 {
compatible = "nxp,pca9555";
reg = <0x22>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca3: pca9555@23 {
compatible = "nxp,pca9555";
reg = <0x23>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca4: pca9555@24 {
compatible = "nxp,pca9555";
reg = <0x24>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
pca5: pca9555@25 {
compatible = "nxp,pca9555";
reg = <0x25>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
};
&i2c9 {
/* cpld */
status = "okay";
};
&i2c10 {
/* hdd bp */
status = "okay";
};
&i2c11 {
status = "okay";
power-supply@58 {
compatible = "pmbus";
reg = <0x58>;
};
power-supply@5a {
compatible = "pmbus";
reg = <0x5a>;
};
};
&i2c12 {
/* odcc */
status = "okay";
};
&vuart {
status = "okay";
};
&gfx {
status = "okay";
memory-region = <&gfx_memory>;
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
&gpio {
pin_gpio_b7 {
gpio-hog;
gpios = <ASPEED_GPIO(B,7) GPIO_ACTIVE_LOW>;
output-high;
line-name = "BMC_INIT_OK";
};
};
&wdt1 {
aspeed,reset-type = "none";
aspeed,external-signal;
aspeed,ext-push-pull;
aspeed,ext-active-high;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdtrst1_default>;
};
&ibt {
status = "okay";
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default &pinctrl_adc1_default
&pinctrl_adc2_default &pinctrl_adc3_default &pinctrl_adc4_default
&pinctrl_adc5_default &pinctrl_adc6_default &pinctrl_adc7_default
&pinctrl_adc8_default &pinctrl_adc9_default &pinctrl_adc10_default
&pinctrl_adc11_default &pinctrl_adc12_default &pinctrl_adc13_default
&pinctrl_adc14_default &pinctrl_adc15_default>;
};
&vhub {
status = "okay";
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default &pinctrl_pwm1_default
&pinctrl_pwm2_default &pinctrl_pwm3_default
&pinctrl_pwm4_default &pinctrl_pwm5_default
&pinctrl_pwm6_default &pinctrl_pwm7_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00 0x01>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x02 0x03>;
};
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x04 0x05>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x06 0x07>;
};
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x08 0x09>;
};
fan@5 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x0a 0x0b>;
};
fan@6 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x0c 0x0d>;
};
fan@7 {
reg = <0x07>;
aspeed,fan-tach-ch = /bits/ 8 <0x0e 0x0f>;
};
};
#include "ibm-power9-dual.dtsi"

View File

@@ -0,0 +1,566 @@
// SPDX-License-Identifier: GPL-2.0+
/*
* Device Tree file for Lenovo Hr630 platform
*
* Copyright (C) 2019-present Lenovo
*/
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "HR630 BMC";
compatible = "lenovo,hr630-bmc", "aspeed,ast2500";
aliases {
i2c14 = &i2c_rbp;
i2c15 = &i2c_fbp1;
i2c16 = &i2c_fbp2;
i2c17 = &i2c_fbp3;
i2c18 = &i2c_riser2;
i2c19 = &i2c_pcie4;
i2c20 = &i2c_riser1;
i2c21 = &i2c_ocp;
};
chosen {
stdout-path = &uart5;
bootargs = "console=tty0 console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
flash_memory: region@98000000 {
no-map;
reg = <0x98000000 0x00100000>; /* 1M */
};
gfx_memory: framebuffer {
size = <0x01000000>;
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
leds {
compatible = "gpio-leds";
heartbeat {
gpios = <&gpio ASPEED_GPIO(J, 1) GPIO_ACTIVE_LOW>;
};
fault {
gpios = <&gpio ASPEED_GPIO(J, 0) GPIO_ACTIVE_LOW>;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>,
<&adc 8>, <&adc 9>, <&adc 10>,
<&adc 12>, <&adc 13>, <&adc 14>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
spi-max-frequency = <50000000>;
#include "openbmc-flash-layout.dtsi"
};
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi1>;
};
&uart1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default>;
};
&uart2 {
/* Rear RS-232 connector */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default
&pinctrl_rxd2_default
&pinctrl_nrts2_default
&pinctrl_ndtr2_default
&pinctrl_ndsr2_default
&pinctrl_ncts2_default
&pinctrl_ndcd2_default
&pinctrl_nri2_default>;
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd3_default
&pinctrl_rxd3_default>;
};
&uart5 {
status = "okay";
};
&ibt {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
use-ncsi;
};
&mac1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii2_default &pinctrl_mdio2_default>;
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default
&pinctrl_adc1_default
&pinctrl_adc2_default
&pinctrl_adc3_default
&pinctrl_adc4_default
&pinctrl_adc5_default
&pinctrl_adc6_default
&pinctrl_adc7_default
&pinctrl_adc8_default
&pinctrl_adc9_default
&pinctrl_adc10_default
&pinctrl_adc12_default
&pinctrl_adc13_default
&pinctrl_adc14_default>;
};
&i2c0 {
status = "okay";
/* temp1 inlet */
tmp75@4e {
compatible = "national,lm75";
reg = <0x4e>;
};
};
&i2c1 {
status = "okay";
/* temp2 outlet */
tmp75@4d {
compatible = "national,lm75";
reg = <0x4d>;
};
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
/* Slot 0,
* Slot 1,
* Slot 2,
* Slot 3
*/
i2c-switch@70 {
compatible = "nxp,pca9545";
reg = <0x70>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect; /* may use mux@70 next. */
i2c_rbp: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2c_fbp1: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2c_fbp2: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
i2c_fbp3: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
&i2c7 {
status = "okay";
/* Slot 0,
* Slot 1,
* Slot 2,
* Slot 3
*/
i2c-switch@76 {
compatible = "nxp,pca9546";
reg = <0x76>;
#address-cells = <1>;
#size-cells = <0>;
i2c-mux-idle-disconnect; /* may use mux@76 next. */
i2c_riser2: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2c_pcie4: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2c_riser1: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
i2c_ocp: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
};
&i2c8 {
status = "okay";
eeprom@57 {
compatible = "atmel,24c256";
reg = <0x57>;
pagesize = <16>;
};
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
};
&i2c12 {
status = "okay";
};
&ehci1 {
status = "okay";
};
&uhci {
status = "okay";
};
&gfx {
status = "okay";
memory-region = <&gfx_memory>;
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default
&pinctrl_pwm1_default
&pinctrl_pwm2_default
&pinctrl_pwm3_default
&pinctrl_pwm4_default
&pinctrl_pwm5_default
&pinctrl_pwm6_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
};
fan@2 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
fan@3 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x03>;
};
fan@4 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x04>;
};
fan@5 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x05>;
};
fan@6 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x06>;
};
fan@7 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x07>;
};
fan@8 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x08>;
};
fan@9 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x09>;
};
fan@10 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x0a>;
};
fan@11 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x0b>;
};
fan@12 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x0c>;
};
fan@13 {
reg = <0x06>;
aspeed,fan-tach-ch = /bits/ 8 <0x0d>;
};
};
&gpio {
pin_gpio_b5 {
gpio-hog;
gpios = <ASPEED_GPIO(B, 5) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "IRQ_BMC_PCH_SMI_LPC_N";
};
pin_gpio_f0 {
gpio-hog;
gpios = <ASPEED_GPIO(F, 0) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "IRQ_BMC_PCH_NMI_R";
};
pin_gpio_f3 {
gpio-hog;
gpios = <ASPEED_GPIO(F, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "I2C_BUS0_RST_OUT_N";
};
pin_gpio_f4 {
gpio-hog;
gpios = <ASPEED_GPIO(F, 4) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "FM_SKT0_FAULT_LED";
};
pin_gpio_f5 {
gpio-hog;
gpios = <ASPEED_GPIO(F, 5) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "FM_SKT1_FAULT_LED";
};
pin_gpio_g4 {
gpio-hog;
gpios = <ASPEED_GPIO(G, 4) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "FAN_PWR_CTL_N";
};
pin_gpio_g7 {
gpio-hog;
gpios = <ASPEED_GPIO(G, 7) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "RST_BMC_PCIE_I2CMUX_N";
};
pin_gpio_h2 {
gpio-hog;
gpios = <ASPEED_GPIO(H, 2) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PSU1_FFS_N_R";
};
pin_gpio_h3 {
gpio-hog;
gpios = <ASPEED_GPIO(H, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PSU2_FFS_N_R";
};
pin_gpio_i3 {
gpio-hog;
gpios = <ASPEED_GPIO(I, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "BMC_INTRUDED_COVER";
};
pin_gpio_j2 {
gpio-hog;
gpios = <ASPEED_GPIO(J, 2) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "BMC_BIOS_UPDATE_N";
};
pin_gpio_j3 {
gpio-hog;
gpios = <ASPEED_GPIO(J, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "RST_BMC_HDD_I2CMUX_N";
};
pin_gpio_s2 {
gpio-hog;
gpios = <ASPEED_GPIO(S, 2) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "BMC_VGA_SW";
};
pin_gpio_s4 {
gpio-hog;
gpios = <ASPEED_GPIO(S, 4) GPIO_ACTIVE_HIGH>;
output;
line-name = "VBAT_EN_N";
};
pin_gpio_s6 {
gpio-hog;
gpios = <ASPEED_GPIO(S, 6) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "PU_BMC_GPIOS6";
};
pin_gpio_y0 {
gpio-hog;
gpios = <ASPEED_GPIO(Y, 0) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "BMC_NCSI_MUX_CTL_S0";
};
pin_gpio_y1 {
gpio-hog;
gpios = <ASPEED_GPIO(Y, 1) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "BMC_NCSI_MUX_CTL_S1";
};
pin_gpio_z0 {
gpio-hog;
gpios = <ASPEED_GPIO(Z, 0) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "I2C_RISER2_INT_N";
};
pin_gpio_z2 {
gpio-hog;
gpios = <ASPEED_GPIO(Z, 2) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "I2C_RISER2_RESET_N";
};
pin_gpio_z3 {
gpio-hog;
gpios = <ASPEED_GPIO(Z, 3) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "FM_BMC_PCH_SCI_LPC_N";
};
pin_gpio_z7 {
gpio-hog;
gpios = <ASPEED_GPIO(Z, 7) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "BMC_POST_CMPLT_N";
};
pin_gpio_aa0 {
gpio-hog;
gpios = <ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
output-low;
line-name = "HOST_BMC_USB_SEL";
};
pin_gpio_aa5 {
gpio-hog;
gpios = <ASPEED_GPIO(AA, 5) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "I2C_BUS1_RST_OUT_N";
};
};

View File

@@ -0,0 +1,207 @@
//SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g4.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Olympus BMC";
compatible = "microsoft,olympus-bmc", "aspeed,ast2400";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@40000000 {
reg = <0x40000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vga_memory: framebuffer@5f000000 {
no-map;
reg = <0x5f000000 0x01000000>; /* 16M */
};
};
leds {
compatible = "gpio-leds";
bmc_heartbeat {
gpios = <&gpio ASPEED_GPIO(B, 0) GPIO_ACTIVE_LOW>;
};
power_green {
gpios = <&gpio ASPEED_GPIO(U, 2) GPIO_ACTIVE_HIGH>;
};
power_amber {
gpios = <&gpio ASPEED_GPIO(U, 3) GPIO_ACTIVE_HIGH>;
};
identify {
gpios = <&gpio ASPEED_GPIO(Q, 5) GPIO_ACTIVE_LOW>;
};
fault {
gpios = <&gpio ASPEED_GPIO(A, 1) GPIO_ACTIVE_LOW>;
};
};
iio-hwmon {
compatible = "iio-hwmon";
io-channels = <&adc 0>, <&adc 1>, <&adc 2>, <&adc 3>,
<&adc 4>, <&adc 5>, <&adc 6>, <&adc 7>;
};
};
&adc {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_adc0_default
&pinctrl_adc1_default
&pinctrl_adc2_default
&pinctrl_adc3_default
&pinctrl_adc4_default
&pinctrl_adc5_default
&pinctrl_adc6_default
&pinctrl_adc7_default>;
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "openbmc-flash-layout.dtsi"
};
};
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
m25p,fast-read;
label = "pnor";
};
};
&uart5 {
status = "okay";
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rgmii1_default &pinctrl_mdio1_default>;
};
&i2c0 {
status = "okay";
};
&i2c1 {
status = "okay";
tmp421@4c {
compatible = "ti,tmp421";
reg = <0x4c>;
};
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
clock-frequency = <100000>;
};
&i2c5 {
status = "okay";
};
&i2c6 {
status = "okay";
tmp421@4c {
compatible = "ti,tmp421";
reg = <0x4c>;
};
};
&i2c7 {
status = "okay";
};
&vuart {
status = "okay";
};
&wdt2 {
status = "okay";
};
&lpc_ctrl {
status = "okay";
};
&pwm_tacho {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_pwm0_default
&pinctrl_pwm1_default
&pinctrl_pwm2_default
&pinctrl_pwm3_default
&pinctrl_pwm4_default
&pinctrl_pwm5_default
&pinctrl_pwm6_default>;
fan@0 {
reg = <0x00>;
aspeed,fan-tach-ch = /bits/ 8 <0x00>;
};
fan@1 {
reg = <0x01>;
aspeed,fan-tach-ch = /bits/ 8 <0x01>;
};
fan@2 {
reg = <0x02>;
aspeed,fan-tach-ch = /bits/ 8 <0x02>;
};
fan@3 {
reg = <0x03>;
aspeed,fan-tach-ch = /bits/ 8 <0x03>;
};
fan@4 {
reg = <0x04>;
aspeed,fan-tach-ch = /bits/ 8 <0x04>;
};
fan@5 {
reg = <0x05>;
aspeed,fan-tach-ch = /bits/ 8 <0x05>;
};
};

View File

@@ -322,3 +322,5 @@
&adc {
status = "okay";
};
#include "ibm-power9-dual.dtsi"

View File

@@ -347,3 +347,25 @@
line-name = "BMC_TPM_INT_N";
};
};
&fsi {
cfam@0,0 {
reg = <0 0>;
#address-cells = <1>;
#size-cells = <1>;
chip-id = <0>;
scom@1000 {
compatible = "ibm,fsi2pib";
reg = <0x1000 0x400>;
};
fsi_hub0: hub@3400 {
compatible = "ibm,fsi-master-hub";
reg = <0x3400 0x400>;
#address-cells = <2>;
#size-cells = <0>;
no-scan-on-init;
};
};
};

View File

@@ -42,6 +42,13 @@
compatible = "shared-dma-pool";
reusable;
};
video_engine_memory: jpegbuffer {
size = <0x02000000>; /* 32M */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
leds {
@@ -304,3 +311,10 @@
&adc {
status = "okay";
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
#include "ibm-power9-dual.dtsi"

View File

@@ -0,0 +1,966 @@
// SPDX-License-Identifier: GPL-2.0+
/dts-v1/;
#include "aspeed-g5.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
#include <dt-bindings/leds/leds-pca955x.h>
/ {
model = "Swift BMC";
compatible = "ibm,swift-bmc", "aspeed,ast2500";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory@80000000 {
reg = <0x80000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
flash_memory: region@98000000 {
no-map;
reg = <0x98000000 0x04000000>; /* 64M */
};
gfx_memory: framebuffer {
size = <0x01000000>;
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
gpio-keys {
compatible = "gpio-keys";
air-water {
label = "air-water";
gpios = <&gpio ASPEED_GPIO(B, 5) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(B, 5)>;
};
checkstop {
label = "checkstop";
gpios = <&gpio ASPEED_GPIO(J, 2) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(J, 2)>;
};
ps0-presence {
label = "ps0-presence";
gpios = <&gpio ASPEED_GPIO(R, 7) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(R, 7)>;
};
ps1-presence {
label = "ps1-presence";
gpios = <&gpio ASPEED_GPIO(N, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(N, 0)>;
};
oppanel-presence {
label = "oppanel-presence";
gpios = <&gpio ASPEED_GPIO(A, 7) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(A, 7)>;
};
opencapi-riser-presence {
label = "opencapi-riser-presence";
gpios = <&gpio ASPEED_GPIO(I, 0) GPIO_ACTIVE_LOW>;
linux,code = <ASPEED_GPIO(I, 0)>;
};
};
iio-hwmon-battery {
compatible = "iio-hwmon";
io-channels = <&adc 12>;
};
gpio-keys-polled {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <1000>;
scm0-presence {
label = "scm0-presence";
gpios = <&pca9552 6 GPIO_ACTIVE_LOW>;
linux,code = <6>;
};
scm1-presence {
label = "scm1-presence";
gpios = <&pca9552 7 GPIO_ACTIVE_LOW>;
linux,code = <7>;
};
cpu0vrm-presence {
label = "cpu0vrm-presence";
gpios = <&pca9552 12 GPIO_ACTIVE_LOW>;
linux,code = <12>;
};
cpu1vrm-presence {
label = "cpu1vrm-presence";
gpios = <&pca9552 13 GPIO_ACTIVE_LOW>;
linux,code = <13>;
};
fan0-presence {
label = "fan0-presence";
gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
linux,code = <5>;
};
fan1-presence {
label = "fan1-presence";
gpios = <&pca0 6 GPIO_ACTIVE_LOW>;
linux,code = <6>;
};
fan2-presence {
label = "fan2-presence";
gpios = <&pca0 7 GPIO_ACTIVE_LOW>;
linux,code = <7>;
};
fan3-presence {
label = "fan3-presence";
gpios = <&pca0 8 GPIO_ACTIVE_LOW>;
linux,code = <8>;
};
fanboost-presence {
label = "fanboost-presence";
gpios = <&pca0 9 GPIO_ACTIVE_LOW>;
linux,code = <9>;
};
};
leds {
compatible = "gpio-leds";
fan0 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
};
fan1 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
};
fan2 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
};
fan3 {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
};
fanboost {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
};
front-fault {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca1 2 GPIO_ACTIVE_LOW>;
};
front-power {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca1 3 GPIO_ACTIVE_LOW>;
};
front-id {
retain-state-shutdown;
default-state = "keep";
gpios = <&pca1 0 GPIO_ACTIVE_LOW>;
};
rear-fault {
gpios = <&gpio ASPEED_GPIO(N, 2) GPIO_ACTIVE_LOW>;
};
rear-id {
gpios = <&gpio ASPEED_GPIO(N, 4) GPIO_ACTIVE_LOW>;
};
};
fsi: gpio-fsi {
compatible = "fsi-master-gpio", "fsi-master";
#address-cells = <2>;
#size-cells = <0>;
no-gpio-delays;
clock-gpios = <&gpio ASPEED_GPIO(AA, 0) GPIO_ACTIVE_HIGH>;
data-gpios = <&gpio ASPEED_GPIO(E, 0) GPIO_ACTIVE_HIGH>;
mux-gpios = <&gpio ASPEED_GPIO(P, 4) GPIO_ACTIVE_HIGH>;
enable-gpios = <&gpio ASPEED_GPIO(P, 0) GPIO_ACTIVE_HIGH>;
trans-gpios = <&gpio ASPEED_GPIO(P, 3) GPIO_ACTIVE_HIGH>;
};
iio-hwmon-dps310 {
compatible = "iio-hwmon";
io-channels = <&dps 0>;
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
label = "bmc";
m25p,fast-read;
spi-max-frequency = <100000000>;
partitions {
#address-cells = < 1 >;
#size-cells = < 1 >;
compatible = "fixed-partitions";
u-boot@0 {
reg = < 0 0x60000 >;
label = "u-boot";
};
u-boot-env@60000 {
reg = < 0x60000 0x20000 >;
label = "u-boot-env";
};
obmc-ubi@80000 {
reg = < 0x80000 0x7F80000>;
label = "obmc-ubi";
};
};
};
flash@1 {
status = "okay";
label = "alt-bmc";
m25p,fast-read;
spi-max-frequency = <100000000>;
partitions {
#address-cells = < 1 >;
#size-cells = < 1 >;
compatible = "fixed-partitions";
u-boot@0 {
reg = < 0 0x60000 >;
label = "alt-u-boot";
};
u-boot-env@60000 {
reg = < 0x60000 0x20000 >;
label = "alt-u-boot-env";
};
obmc-ubi@80000 {
reg = < 0x80000 0x7F80000>;
label = "alt-obmc-ubi";
};
};
};
};
&spi1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1_default>;
flash@0 {
status = "okay";
label = "pnor";
m25p,fast-read;
spi-max-frequency = <100000000>;
};
};
&uart1 {
/* Rear RS-232 connector */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd1_default
&pinctrl_rxd1_default
&pinctrl_nrts1_default
&pinctrl_ndtr1_default
&pinctrl_ndsr1_default
&pinctrl_ncts1_default
&pinctrl_ndcd1_default
&pinctrl_nri1_default>;
};
&uart2 {
/* APSS */
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
};
&uart5 {
status = "okay";
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi1>;
};
&mac0 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
use-ncsi;
};
&i2c2 {
status = "okay";
/* MUX ->
* Samtec 1
* Samtec 2
*/
};
&i2c3 {
status = "okay";
max31785@52 {
compatible = "maxim,max31785a";
reg = <0x52>;
#address-cells = <1>;
#size-cells = <0>;
fan@0 {
compatible = "pmbus-fan";
reg = <0>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
fan@1 {
compatible = "pmbus-fan";
reg = <1>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
fan@2 {
compatible = "pmbus-fan";
reg = <2>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
fan@3 {
compatible = "pmbus-fan";
reg = <3>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
fan@4 {
compatible = "pmbus-fan";
reg = <4>;
tach-pulses = <2>;
maxim,fan-rotor-input = "tach";
maxim,fan-pwm-freq = <25000>;
maxim,fan-no-watchdog;
maxim,fan-no-fault-ramp;
maxim,fan-ramp = <2>;
maxim,fan-fault-pin-mon;
};
};
pca0: pca9552@60 {
compatible = "nxp,pca9552";
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@8 {
reg = <8>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@9 {
reg = <9>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@10 {
reg = <10>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@11 {
reg = <11>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@12 {
reg = <12>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@13 {
reg = <13>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@14 {
reg = <14>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@15 {
reg = <15>;
type = <PCA955X_TYPE_GPIO>;
};
};
power-supply@68 {
compatible = "ibm,cffps1";
reg = <0x68>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
power-supply@69 {
compatible = "ibm,cffps1";
reg = <0x69>;
};
eeprom@51 {
compatible = "atmel,24c64";
reg = <0x51>;
};
};
&i2c7 {
status = "okay";
dps: dps310@76 {
compatible = "infineon,dps310";
reg = <0x76>;
#io-channel-cells = <0>;
};
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
si7021a20@20 {
compatible = "si,si7021a20";
reg = <0x20>;
};
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
pca1: pca9551@60 {
compatible = "nxp,pca9551";
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
};
};
&i2c8 {
status = "okay";
pca9552: pca9552@60 {
compatible = "nxp,pca9552";
reg = <0x60>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio-line-names = "PS_SMBUS_RESET_N", "APSS_RESET_N",
"GPU0_TH_OVERT_N_BUFF", "GPU1_TH_OVERT_N_BUFF",
"GPU2_TH_OVERT_N_BUFF", "GPU3_TH_OVERT_N_BUFF",
"P9_SCM0_PRES", "P9_SCM1_PRES",
"GPU0_PWR_GOOD_BUFF", "GPU1_PWR_GOOD_BUFF",
"GPU2_PWR_GOOD_BUFF", "GPU3_PWR_GOOD_BUFF",
"PRESENT_VRM_CP0_N", "PRESENT_VRM_CP1_N",
"12V_BREAKER_FLT_N", "THROTTLE_UNLATCHED_N";
gpio@0 {
reg = <0>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@1 {
reg = <1>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@2 {
reg = <2>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@3 {
reg = <3>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@4 {
reg = <4>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@5 {
reg = <5>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@6 {
reg = <6>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@7 {
reg = <7>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@8 {
reg = <8>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@9 {
reg = <9>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@10 {
reg = <10>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@11 {
reg = <11>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@12 {
reg = <12>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@13 {
reg = <13>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@14 {
reg = <14>;
type = <PCA955X_TYPE_GPIO>;
};
gpio@15 {
reg = <15>;
type = <PCA955X_TYPE_GPIO>;
};
};
rtc@32 {
compatible = "epson,rx8900";
reg = <0x32>;
};
eeprom@51 {
compatible = "atmel,24c64";
reg = <0x51>;
};
ucd90160@64 {
compatible = "ti,ucd90160";
reg = <0x64>;
};
};
&i2c9 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
tmp423a@4c {
compatible = "ti,tmp423";
reg = <0x4c>;
};
ir35221@71 {
compatible = "infineon,ir35221";
reg = <0x71>;
};
ir35221@72 {
compatible = "infineon,ir35221";
reg = <0x72>;
};
pca2: pca9539@74 {
compatible = "nxp,pca9539";
reg = <0x74>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
};
gpio@1 {
reg = <1>;
};
gpio@2 {
reg = <2>;
};
gpio@3 {
reg = <3>;
};
gpio@4 {
reg = <4>;
};
gpio@5 {
reg = <5>;
};
gpio@6 {
reg = <6>;
};
gpio@7 {
reg = <7>;
};
gpio@8 {
reg = <8>;
};
gpio@9 {
reg = <9>;
};
gpio@10 {
reg = <10>;
};
gpio@11 {
reg = <11>;
};
gpio@12 {
reg = <12>;
};
gpio@13 {
reg = <13>;
};
gpio@14 {
reg = <14>;
};
gpio@15 {
reg = <15>;
};
};
};
&i2c10 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c64";
reg = <0x50>;
};
tmp423a@4c {
compatible = "ti,tmp423";
reg = <0x4c>;
};
ir35221@71 {
compatible = "infineon,ir35221";
reg = <0x71>;
};
ir35221@72 {
compatible = "infineon,ir35221";
reg = <0x72>;
};
pca3: pca9539@74 {
compatible = "nxp,pca9539";
reg = <0x74>;
#address-cells = <1>;
#size-cells = <0>;
gpio-controller;
#gpio-cells = <2>;
gpio@0 {
reg = <0>;
};
gpio@1 {
reg = <1>;
};
gpio@2 {
reg = <2>;
};
gpio@3 {
reg = <3>;
};
gpio@4 {
reg = <4>;
};
gpio@5 {
reg = <5>;
};
gpio@6 {
reg = <6>;
};
gpio@7 {
reg = <7>;
};
gpio@8 {
reg = <8>;
};
gpio@9 {
reg = <9>;
};
gpio@10 {
reg = <10>;
};
gpio@11 {
reg = <11>;
};
gpio@12 {
reg = <12>;
};
gpio@13 {
reg = <13>;
};
gpio@14 {
reg = <14>;
};
gpio@15 {
reg = <15>;
};
};
};
&i2c11 {
/* MUX
* -> PCIe Slot 0
* -> PCIe Slot 1
* -> PCIe Slot 2
* -> PCIe Slot 3
*/
status = "okay";
};
&i2c12 {
status = "okay";
tmp275@48 {
compatible = "ti,tmp275";
reg = <0x48>;
};
tmp275@4a {
compatible = "ti,tmp275";
reg = <0x4a>;
};
};
&i2c13 {
status = "okay";
};
&vuart {
status = "okay";
};
&gfx {
status = "okay";
memory-region = <&gfx_memory>;
};
&pinctrl {
aspeed,external-nodes = <&gfx &lhc>;
};
&wdt1 {
aspeed,reset-type = "none";
aspeed,external-signal;
aspeed,ext-push-pull;
aspeed,ext-active-high;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_wdtrst1_default>;
};
&wdt2 {
aspeed,alt-boot;
};
&ibt {
status = "okay";
};
&adc {
status = "okay";
};
#include "ibm-power9-dual.dtsi"

View File

@@ -0,0 +1,224 @@
// SPDX-License-Identifier: GPL-2.0+
// Copyright 2019 YADRO
/dts-v1/;
#include "aspeed-g4.dtsi"
#include <dt-bindings/gpio/aspeed-gpio.h>
/ {
model = "Vesnin BMC";
compatible = "yadro,vesnin-bmc", "aspeed,ast2400";
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
};
memory {
reg = <0x40000000 0x20000000>;
};
reserved-memory {
#address-cells = <1>;
#size-cells = <1>;
ranges;
vga_memory: framebuffer@5f000000 {
no-map;
reg = <0x5f000000 0x01000000>; /* 16MB */
};
flash_memory: region@5c000000 {
no-map;
reg = <0x5c000000 0x02000000>; /* 32M */
};
};
leds {
compatible = "gpio-leds";
heartbeat {
gpios = <&gpio ASPEED_GPIO(R, 4) GPIO_ACTIVE_LOW>;
};
power_red {
gpios = <&gpio ASPEED_GPIO(N, 1) GPIO_ACTIVE_LOW>;
};
id_blue {
gpios = <&gpio ASPEED_GPIO(O, 0) GPIO_ACTIVE_LOW>;
};
alarm_red {
gpios = <&gpio ASPEED_GPIO(N, 6) GPIO_ACTIVE_LOW>;
};
alarm_yel {
gpios = <&gpio ASPEED_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
};
};
gpio-keys {
compatible = "gpio-keys";
button_checkstop {
label = "checkstop";
linux,code = <74>;
gpios = <&gpio ASPEED_GPIO(P, 5) GPIO_ACTIVE_LOW>;
};
button_identify {
label = "identify";
linux,code = <152>;
gpios = <&gpio ASPEED_GPIO(O, 7) GPIO_ACTIVE_LOW>;
};
};
};
&fmc {
status = "okay";
flash@0 {
status = "okay";
m25p,fast-read;
label = "bmc";
#include "openbmc-flash-layout.dtsi"
};
};
&spi {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi1debug_default>;
flash@0 {
status = "okay";
label = "pnor";
m25p,fast-read;
};
};
&mac0 {
status = "okay";
use-ncsi;
no-hw-checksum;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_rmii1_default>;
};
&uart5 {
status = "okay";
};
&lpc_ctrl {
status = "okay";
memory-region = <&flash_memory>;
flash = <&spi>;
};
&ibt {
status = "okay";
};
&uart3 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
};
&i2c0 {
status = "okay";
eeprom@50 {
compatible = "atmel,24c256";
reg = <0x50>;
pagesize = <64>;
};
};
&i2c1 {
status = "okay";
tmp75@49 {
compatible = "ti,tmp75";
reg = <0x49>;
};
};
&i2c2 {
status = "okay";
};
&i2c3 {
status = "okay";
};
&i2c4 {
status = "okay";
occ-hwmon@50 {
compatible = "ibm,p8-occ-hwmon";
reg = <0x50>;
};
};
&i2c5 {
status = "okay";
occ-hwmon@51 {
compatible = "ibm,p8-occ-hwmon";
reg = <0x51>;
};
};
&i2c6 {
status = "okay";
w83795g@2f {
compatible = "nuvoton,w83795g";
reg = <0x2f>;
};
};
&i2c7 {
status = "okay";
occ-hwmon@56 {
compatible = "ibm,p8-occ-hwmon";
reg = <0x56>;
};
};
&i2c9 {
status = "okay";
};
&i2c10 {
status = "okay";
};
&i2c11 {
status = "okay";
occ-hwmon@57 {
compatible = "ibm,p8-occ-hwmon";
reg = <0x57>;
};
};
&i2c12 {
status = "okay";
rtc@68 {
compatible = "maxim,ds3231";
reg = <0x68>;
};
};
&i2c13 {
status = "okay";
};
&vuart {
status = "okay";
};

View File

@@ -33,6 +33,13 @@
compatible = "shared-dma-pool";
reusable;
};
video_engine_memory: jpegbuffer {
size = <0x02000000>; /* 32MM */
alignment = <0x01000000>;
compatible = "shared-dma-pool";
reusable;
};
};
gpio-keys {
@@ -640,3 +647,10 @@
&vhub {
status = "okay";
};
&video {
status = "okay";
memory-region = <&video_engine_memory>;
};
#include "ibm-power9-dual.dtsi"

View File

@@ -7,6 +7,14 @@
model = "Zaius BMC";
compatible = "ingrasys,zaius-bmc", "aspeed,ast2500";
aliases {
i2c15 = &i2cpcie0;
i2c16 = &i2cpcie1;
i2c17 = &i2cpcie2;
i2c19 = &i2cpcie3;
i2c20 = &i2cpcie4;
};
chosen {
stdout-path = &uart5;
bootargs = "console=ttyS4,115200 earlyprintk";
@@ -223,6 +231,27 @@
reg = <0x71>;
#address-cells = <1>;
#size-cells = <0>;
i2cpcie0: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2cpcie1: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
i2cpcie2: i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
};
i2ctpm: i2c@3 {
#address-cells = <1>;
#size-cells = <0>;
reg = <3>;
};
};
/* MUX1 PCA9546A @71h
@@ -253,6 +282,17 @@
reg = <0x71>;
#address-cells = <1>;
#size-cells = <0>;
i2cpcie3: i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
};
i2cpcie4: i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
};
/* MUX1 PCA9546A @71h
@@ -296,33 +336,98 @@
reg = <0x54>;
};
};
};
vrm@64 {
compatible = "isil,isl68137";
reg = <0x64>;
};
vrm@40 {
compatible = "isil,isl68137";
reg = <0x40>;
};
vrm@60 {
compatible = "isil,isl68137";
reg = <0x60>;
};
vrm@43 {
compatible = "infineon,ir38064";
reg = <0x43>;
};
vrm@41 {
compatible = "isil,isl68137";
reg = <0x41>;
};
/* Master selector PCA9541A @70h (other master: CPU0)
* LM5066I PMBUS @10h
*/
/* 12V Quarter Brick DC/DC Converter Q54SJ12050 @61h */
power-brick@61 {
/*
* Brick will be one of these types/addresses. Depending
* on the board SKU only one is actually present and will successfully
* instantiate while the others will fail the probe operation.
* These are the PVT (and presumably beyond) addresses:
* 12V Quarter Brick DC/DC Converter Q54SJ12050 @6Ah
* 12V Quarter Brick DC/DC Converter Q54SH12050 @30h
*/
power-brick@6a {
compatible = "delta,dps800";
reg = <0x61>;
reg = <0x6a>;
};
power-brick@30 {
compatible = "delta,dps800";
reg = <0x30>;
};
/* CPU0 VR ISL68137 0.7V, 0.96V PMBUS @64h */
/* CPU0 VR ISL68137 1.2V CH03 PMBUS @40h */
/* CPU0 VR ISL68137 0.8V PMBUS @60h */
/* CPU0 VR 1.0V IR38064 I2C @11h, PMBUS @41h */
/* CPU0 VR 1.0V IR38064 I2C @11h, PMBUS @43h */
/* CPU0 VR ISL68137 1.2V CH47 PMBUS @41h */
/* Master selector PCA9541A @70h (other master: CPU0)
* LM5066I PMBUS @10h
*/
};
&i2c8 {
status = "okay";
/* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @65h */
/* CPU1 VR ISL68137 1.2V CH03 PMBUS @44h */
/* CPU1 VR ISL68137 0.8V PMBUS @61h */
vrm@64 {
compatible = "isil,isl68137";
reg = <0x64>;
};
vrm@40 {
compatible = "isil,isl68137";
reg = <0x40>;
};
vrm@41 {
compatible = "isil,isl68137";
reg = <0x41>;
};
vrm@42 {
compatible = "infineon,ir38064";
reg = <0x42>;
};
vrm@60 {
compatible = "isil,isl68137";
reg = <0x60>;
};
/* CPU1 VR ISL68137 0.7V, 0.96V PMBUS @64h */
/* CPU1 VR ISL68137 1.2V CH03 PMBUS @40h */
/* CPU1 VR ISL68137 1.2V CH47 PMBUS @41h */
/* CPU1 VR 1.0V IR38064 I2C @12h, PMBUS @42h */
/* CPU0 VR ISL68137 1.2V CH47 PMBUS @45h */
/* CPU1 VR ISL68137 0.8V PMBUS @60h */
};
@@ -435,3 +540,5 @@
&ibt {
status = "okay";
};
#include "ibm-power9-dual.dtsi"

View File

@@ -112,6 +112,11 @@
&pinctrl_ddcclk_default &pinctrl_ddcdat_default>;
};
&p2a {
status = "okay";
memory-region = <&vga_memory>;
};
&ibt {
status = "okay";
};

View File

@@ -53,7 +53,7 @@
#size-cells = <1>;
ranges;
fmc: flash-controller@1e620000 {
fmc: spi@1e620000 {
reg = < 0x1e620000 0x94
0x20000000 0x10000000 >;
#address-cells = <1>;
@@ -69,7 +69,7 @@
};
};
spi: flash-controller@1e630000 {
spi: spi@1e630000 {
reg = < 0x1e630000 0x18
0x30000000 0x10000000 >;
#address-cells = <1>;
@@ -165,6 +165,10 @@
compatible = "aspeed,g4-pinctrl";
};
p2a: p2a-control {
compatible = "aspeed,ast2400-p2a-ctrl";
status = "disabled";
};
};
rng: hwrng@1e6e2078 {

View File

@@ -60,7 +60,7 @@
#size-cells = <1>;
ranges;
fmc: flash-controller@1e620000 {
fmc: spi@1e620000 {
reg = < 0x1e620000 0xc4
0x20000000 0x10000000 >;
#address-cells = <1>;
@@ -86,7 +86,7 @@
};
};
spi1: flash-controller@1e630000 {
spi1: spi@1e630000 {
reg = < 0x1e630000 0xc4
0x30000000 0x08000000 >;
#address-cells = <1>;
@@ -106,7 +106,7 @@
};
};
spi2: flash-controller@1e631000 {
spi2: spi@1e631000 {
reg = < 0x1e631000 0xc4
0x38000000 0x08000000 >;
#address-cells = <1>;
@@ -219,6 +219,11 @@
aspeed,external-nodes = <&gfx &lhc>;
};
p2a: p2a-control {
compatible = "aspeed,ast2500-p2a-ctrl";
status = "disabled";
};
};
rng: hwrng@1e6e2078 {

View File

@@ -42,7 +42,7 @@
clock-frequency = <12000000>;
};
&slow_osc {
&clk32k {
atmel,osc-bypass;
};

View File

@@ -14,14 +14,6 @@
chosen {
bootargs = "rootfstype=ubifs ubi.mtd=5 root=ubi0:rootfs rw";
stdout-path = "serial0:115200n8";
clocksource {
timer = <&timer0>;
};
clockevent {
timer = <&timer1>;
};
};
memory {

View File

@@ -1258,30 +1258,11 @@
};
};
sckc@fffffd50 {
clk32k: sckc@fffffd50 {
compatible = "atmel,at91sam9x5-sckc";
reg = <0xfffffd50 0x4>;
slow_osc: slow_osc {
compatible = "atmel,at91sam9x5-clk-slow-osc";
#clock-cells = <0>;
atmel,startup-time-usec = <1200000>;
clocks = <&slow_xtal>;
};
slow_rc_osc: slow_rc_osc {
compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
#clock-cells = <0>;
atmel,startup-time-usec = <75>;
clock-frequency = <32768>;
clock-accuracy = <50000000>;
};
clk32k: slck {
compatible = "atmel,at91sam9x5-clk-slow";
#clock-cells = <0>;
clocks = <&slow_rc_osc &slow_osc>;
};
clocks = <&slow_xtal>;
#clock-cells = <0>;
};
rtc@fffffd20 {

View File

@@ -868,30 +868,11 @@
status = "disabled";
};
sckc@fffffd50 {
clk32k: sckc@fffffd50 {
compatible = "atmel,at91sam9x5-sckc";
reg = <0xfffffd50 0x4>;
slow_osc: slow_osc {
compatible = "atmel,at91sam9x5-clk-slow-osc";
#clock-cells = <0>;
atmel,startup-time-usec = <1200000>;
clocks = <&slow_xtal>;
};
slow_rc_osc: slow_rc_osc {
compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
#clock-cells = <0>;
atmel,startup-time-usec = <75>;
clock-frequency = <32768>;
clock-accuracy = <50000000>;
};
clk32k: slck {
compatible = "atmel,at91sam9x5-clk-slow";
#clock-cells = <0>;
clocks = <&slow_rc_osc &slow_osc>;
};
clocks = <&slow_xtal>;
#clock-cells = <0>;
};
rtc@fffffd20 {

View File

@@ -149,28 +149,11 @@
clocks = <&pmc PMC_TYPE_CORE PMC_MCK>;
};
sckc@fffffe50 {
clk32k: sckc@fffffe50 {
compatible = "atmel,at91sam9x5-sckc";
reg = <0xfffffe50 0x4>;
slow_osc: slow_osc {
compatible = "atmel,at91sam9x5-clk-slow-osc";
#clock-cells = <0>;
clocks = <&slow_xtal>;
};
slow_rc_osc: slow_rc_osc {
compatible = "atmel,at91sam9x5-clk-slow-rc-osc";
#clock-cells = <0>;
clock-frequency = <32768>;
clock-accuracy = <50000000>;
};
clk32k: slck {
compatible = "atmel,at91sam9x5-clk-slow";
#clock-cells = <0>;
clocks = <&slow_rc_osc>, <&slow_osc>;
};
clocks = <&slow_xtal>;
#clock-cells = <0>;
};
tcb0: timer@f8008000 {

View File

@@ -42,7 +42,7 @@ clocks {
};
/* Cygnus ARM PLL */
armpll: armpll {
armpll: armpll@19000000 {
#clock-cells = <0>;
compatible = "brcm,cygnus-armpll";
clocks = <&osc>;
@@ -67,7 +67,7 @@ clocks {
clock-mult = <1>;
};
genpll: genpll {
genpll: genpll@301d000 {
#clock-cells = <1>;
compatible = "brcm,cygnus-genpll";
reg = <0x0301d000 0x2c>, <0x0301c020 0x4>;
@@ -94,7 +94,7 @@ clocks {
clock-mult = <1>;
};
lcpll0: lcpll0 {
lcpll0: lcpll0@301d02c {
#clock-cells = <1>;
compatible = "brcm,cygnus-lcpll0";
reg = <0x0301d02c 0x1c>, <0x0301c020 0x4>;
@@ -103,7 +103,7 @@ clocks {
"usb_phy", "smart_card", "ch5";
};
mipipll: mipipll {
mipipll: mipipll@180a9800 {
#clock-cells = <1>;
compatible = "brcm,cygnus-mipipll";
reg = <0x180a9800 0x2c>, <0x0301c020 0x4>, <0x180aa024 0x4>;
@@ -113,7 +113,7 @@ clocks {
"ch5_unused";
};
asiu_clks: asiu_clks {
asiu_clks: asiu_clks@301d048 {
#clock-cells = <1>;
compatible = "brcm,cygnus-asiu-clk";
reg = <0x0301d048 0xc>, <0x180aa024 0x4>;
@@ -122,7 +122,7 @@ clocks {
clock-output-names = "keypad", "adc/touch", "pwm";
};
audiopll: audiopll {
audiopll: audiopll@180aeb00 {
#clock-cells = <1>;
compatible = "brcm,cygnus-audiopll";
reg = <0x180aeb00 0x68>;

View File

@@ -45,7 +45,7 @@
ethernet0 = &eth0;
};
memory {
memory@0 {
device_type = "memory";
reg = <0 0>;
};
@@ -69,7 +69,7 @@
interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
};
core {
core@19000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x19000000 0x1000000>;
#address-cells = <1>;
@@ -91,7 +91,7 @@
<0x20100 0x100>;
};
L2: l2-cache {
L2: l2-cache@22000 {
compatible = "arm,pl310-cache";
reg = <0x22000 0x1000>;
cache-unified;

View File

@@ -77,7 +77,7 @@
interrupt-affinity = <&cpu0>, <&cpu1>;
};
mpcore {
mpcore@19000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x19000000 0x00023000>;
#address-cells = <1>;
@@ -122,7 +122,7 @@
<0x20100 0x100>;
};
L2: l2-cache {
L2: l2-cache@22000 {
compatible = "arm,pl310-cache";
reg = <0x22000 0x1000>;
cache-unified;
@@ -166,7 +166,7 @@
};
};
axi {
axi@18000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x18000000 0x0011c40c>;
#address-cells = <1>;
@@ -415,9 +415,6 @@
"imp_sleep_timer_p5",
"imp_sleep_timer_p7",
"imp_sleep_timer_p8";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
/* ports are defined in board DTS */

View File

@@ -100,7 +100,7 @@
reg-io-width = <4>;
};
L2: l2-cache {
L2: l2-cache@3ff20000 {
compatible = "brcm,bcm11351-a2-pl310-cache";
reg = <0x3ff20000 0x1000>;
cache-unified;
@@ -225,21 +225,21 @@
#size-cells = <1>;
ranges;
root_ccu: root_ccu {
root_ccu: root_ccu@35001000 {
compatible = "brcm,bcm11351-root-ccu";
reg = <0x35001000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "frac_1m";
};
hub_ccu: hub_ccu {
hub_ccu: hub_ccu@34000000 {
compatible = "brcm,bcm11351-hub-ccu";
reg = <0x34000000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "tmon_1m";
};
aon_ccu: aon_ccu {
aon_ccu: aon_ccu@35002000 {
compatible = "brcm,bcm11351-aon-ccu";
reg = <0x35002000 0x0f00>;
#clock-cells = <1>;
@@ -248,7 +248,7 @@
"pmu_bsc_var";
};
master_ccu: master_ccu {
master_ccu: master_ccu@3f001000 {
compatible = "brcm,bcm11351-master-ccu";
reg = <0x3f001000 0x0f00>;
#clock-cells = <1>;
@@ -261,7 +261,7 @@
"hsic2_12m";
};
slave_ccu: slave_ccu {
slave_ccu: slave_ccu@3e011000 {
compatible = "brcm,bcm11351-slave-ccu";
reg = <0x3e011000 0x0f00>;
#clock-cells = <1>;

View File

@@ -21,7 +21,7 @@
model = "BCM21664 Garnet board";
compatible = "brcm,bcm21664-garnet", "brcm,bcm21664";
memory {
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>; /* 1 GB */
};

View File

@@ -90,7 +90,7 @@
reg-io-width = <4>;
};
L2: l2-cache {
L2: l2-cache@3ff20000 {
compatible = "arm,pl310-cache";
reg = <0x3ff20000 0x1000>;
cache-unified;
@@ -295,21 +295,21 @@
clock-frequency = <156000000>;
};
root_ccu: root_ccu {
root_ccu: root_ccu@35001000 {
compatible = BCM21664_DT_ROOT_CCU_COMPAT;
reg = <0x35001000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "frac_1m";
};
aon_ccu: aon_ccu {
aon_ccu: aon_ccu@35002000 {
compatible = BCM21664_DT_AON_CCU_COMPAT;
reg = <0x35002000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "hub_timer";
};
master_ccu: master_ccu {
master_ccu: master_ccu@3f001000 {
compatible = BCM21664_DT_MASTER_CCU_COMPAT;
reg = <0x3f001000 0x0f00>;
#clock-cells = <1>;
@@ -323,7 +323,7 @@
"sdio4_sleep";
};
slave_ccu: slave_ccu {
slave_ccu: slave_ccu@3e011000 {
compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
reg = <0x3e011000 0x0f00>;
#clock-cells = <1>;

View File

@@ -45,7 +45,7 @@
bootargs = "console=ttyS0,115200n8";
};
memory {
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>; /* 512 MB */
};

View File

@@ -371,21 +371,21 @@
clock-frequency = <156000000>;
};
root_ccu: root_ccu {
root_ccu: root_ccu@35001000 {
compatible = BCM21664_DT_ROOT_CCU_COMPAT;
reg = <0x35001000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "frac_1m";
};
aon_ccu: aon_ccu {
aon_ccu: aon_ccu@35002000 {
compatible = BCM21664_DT_AON_CCU_COMPAT;
reg = <0x35002000 0x0f00>;
#clock-cells = <1>;
clock-output-names = "hub_timer";
};
slave_ccu: slave_ccu {
slave_ccu: slave_ccu@3e011000 {
compatible = BCM21664_DT_SLAVE_CCU_COMPAT;
reg = <0x3e011000 0x0f00>;
#clock-cells = <1>;
@@ -398,7 +398,7 @@
"bsc4";
};
master_ccu: master_ccu {
master_ccu: master_ccu@3f001000 {
compatible = BCM21664_DT_MASTER_CCU_COMPAT;
reg = <0x3f001000 0x0f00>;
#clock-cells = <1>;

View File

@@ -21,7 +21,7 @@
model = "BCM28155 AP board";
compatible = "brcm,bcm28155-ap", "brcm,bcm11351";
memory {
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>; /* 1 GB */
};

View File

@@ -431,6 +431,8 @@
reg = <0x7e204000 0x1000>;
interrupts = <2 22>;
clocks = <&clocks BCM2835_CLOCK_VPU>;
dmas = <&dma 6>, <&dma 7>;
dma-names = "tx", "rx";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";

View File

@@ -19,7 +19,7 @@
bootargs = "console=ttyS0,115200";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
@@ -69,8 +69,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
rfkill {
label = "WiFi";

View File

@@ -19,7 +19,7 @@
bootargs = "console=ttyS0,115200";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
@@ -53,8 +53,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
brightness {
label = "Backlight";

View File

@@ -19,7 +19,7 @@
bootargs = "console=ttyS0,115200 earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x18000000>;
@@ -99,8 +99,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -16,15 +16,13 @@
bootargs = "console=ttyS0,115200";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
wps {
label = "WPS";

View File

@@ -17,15 +17,13 @@
bootargs = "console=ttyS0,115200";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
wps {
label = "WPS";

View File

@@ -15,7 +15,7 @@
bootargs = "console=ttyS0,115200 earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
@@ -44,8 +44,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -19,7 +19,7 @@
bootargs = "console=ttyS0,115200 earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
@@ -51,8 +51,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -62,8 +62,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
wps {
label = "WPS";

View File

@@ -19,7 +19,7 @@
bootargs = "console=ttyS0,115200";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
@@ -58,8 +58,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
wps {
label = "WPS";

View File

@@ -19,7 +19,7 @@
bootargs = "console=ttyS0,115200 earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
@@ -93,8 +93,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
rfkill {
label = "WiFi";

View File

@@ -19,7 +19,7 @@
bootargs = "console=ttyS0,115200";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
@@ -59,8 +59,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -19,7 +19,7 @@
bootargs = "console=ttyS0,115200 earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
@@ -90,8 +90,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
aoss {
label = "AOSS";

View File

@@ -19,7 +19,7 @@
bootargs = "console=ttyS0,115200";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
@@ -95,8 +95,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -15,7 +15,7 @@
bootargs = "console=ttyS0,115200";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
@@ -44,8 +44,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -16,7 +16,7 @@
bootargs = "console=ttyS0,115200";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
@@ -88,8 +88,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -15,7 +15,7 @@
bootargs = "earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
@@ -76,8 +76,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
rfkill {
label = "WiFi";

View File

@@ -19,7 +19,7 @@
bootargs = "console=ttyS0,115200 earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
@@ -85,8 +85,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
wps {
label = "WPS";

View File

@@ -16,7 +16,7 @@
bootargs = "console=ttyS0,115200";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
@@ -24,8 +24,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
wps {
label = "WPS";

View File

@@ -16,7 +16,7 @@
bootargs = "earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x18000000>;
@@ -43,8 +43,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -15,7 +15,7 @@
bootargs = "earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
@@ -42,8 +42,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -16,7 +16,7 @@
bootargs = "earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x18000000>;
@@ -43,8 +43,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -16,7 +16,7 @@
bootargs = "console=ttyS0,115200 earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x08000000>;
@@ -83,8 +83,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -16,7 +16,7 @@
bootargs = "earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x18000000>;
@@ -58,8 +58,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -16,7 +16,7 @@
bootargs = "console=ttyS0,115200";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x18000000>;
@@ -64,8 +64,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
brightness {
label = "Backlight";

View File

@@ -13,7 +13,7 @@
compatible = "phicomm,k3", "brcm,bcm47094", "brcm,bcm4708";
model = "Phicomm K3";
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000
0x88000000 0x18000000>;
@@ -21,8 +21,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -15,7 +15,7 @@
bootargs = "earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
@@ -38,8 +38,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -15,7 +15,7 @@
bootargs = "earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
@@ -48,8 +48,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -15,7 +15,7 @@
bootargs = "console=ttyS0,115200 earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
@@ -58,8 +58,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
rfkill {
label = "WiFi";

View File

@@ -19,7 +19,7 @@
#size-cells = <1>;
interrupt-parent = <&gic>;
chipcommonA {
chipcommonA@18000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x18000000 0x00001000>;
#address-cells = <1>;
@@ -44,7 +44,7 @@
};
};
mpcore {
mpcore@19000000 {
compatible = "simple-bus";
ranges = <0x00000000 0x19000000 0x00023000>;
#address-cells = <1>;
@@ -148,7 +148,7 @@
};
};
usb2_phy: usb2-phy {
usb2_phy: usb2-phy@1800c000 {
compatible = "brcm,ns-usb2-phy";
reg = <0x1800c000 0x1000>;
reg-names = "dmu";
@@ -357,7 +357,7 @@
#address-cells = <0>;
};
mdio-bus-mux {
mdio-bus-mux@18003000 {
compatible = "mdio-mux-mmioreg";
mdio-parent-bus = <&mdio>;
#address-cells = <1>;
@@ -464,8 +464,6 @@
srab: srab@18007000 {
compatible = "brcm,bcm5301x-srab";
reg = <0x18007000 0x1000>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";

View File

@@ -32,7 +32,7 @@
};
};
mpcore {
mpcore@18310000 {
compatible = "simple-bus";
ranges = <0x00000000 0x18310000 0x00008000>;
#address-cells = <1>;

View File

@@ -41,9 +41,6 @@
};
clocks {
#address-cells = <1>;
#size-cells = <0>;
/* UBUS peripheral clock */
periph_clk: periph_clk {
#clock-cells = <0>;
@@ -94,7 +91,7 @@
reg = <0x1e000 0x100>;
};
gic: interrupt-controller@1e100 {
gic: interrupt-controller@1f000 {
compatible = "arm,cortex-a9-gic";
reg = <0x1f000 0x1000
0x1e100 0x100>;
@@ -125,7 +122,7 @@
IRQ_TYPE_LEVEL_HIGH)>;
};
armpll: armpll {
armpll: armpll@20000 {
#clock-cells = <0>;
compatible = "brcm,bcm63138-armpll";
clocks = <&periph_clk>;
@@ -144,7 +141,7 @@
#reset-cells = <2>;
};
ahci: sata@8000 {
ahci: sata@a000 {
compatible = "brcm,bcm63138-ahci", "brcm,sata3-ahci";
reg-names = "ahci", "top-ctrl";
reg = <0xa000 0x9ac>, <0x8040 0x24>;

View File

@@ -6,7 +6,7 @@
model = "Broadcom STB (bcm7445), SVMB reference board";
compatible = "brcm,bcm7445", "brcm,brcmstb";
memory {
memory@0 {
device_type = "memory";
reg = <0x00 0x00000000 0x00 0x40000000>,
<0x00 0x40000000 0x00 0x40000000>,

View File

@@ -63,7 +63,7 @@
<GIC_PPI 10 (GIC_CPU_MASK_RAW(15) | IRQ_TYPE_LEVEL_LOW)>;
};
rdb {
rdb@f0000000 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "simple-bus";
@@ -224,7 +224,7 @@
};
memory_controllers {
memory_controllers@f1100000 {
compatible = "simple-bus";
ranges = <0x0 0x0 0xf1100000 0x200000>;
#address-cells = <1>;
@@ -252,7 +252,7 @@
};
};
memc@1 {
memc@80000 {
compatible = "brcm,brcmstb-memc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
@@ -274,7 +274,7 @@
};
};
memc@2 {
memc@100000 {
compatible = "brcm,brcmstb-memc", "simple-bus";
#address-cells = <1>;
#size-cells = <1>;

View File

@@ -49,8 +49,6 @@
gpio_keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
hook {
label = "HOOK";

View File

@@ -17,7 +17,7 @@
bootargs = "console=ttyS0,115200 earlycon";
};
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x08000000>;
};
@@ -43,8 +43,6 @@
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
restart {
label = "Reset";

View File

@@ -39,15 +39,13 @@
model = "NorthStar Enterprise Router (BCM953012ER)";
compatible = "brcm,bcm953012er", "brcm,brcm53012", "brcm,bcm4708";
memory {
memory@0 {
device_type = "memory";
reg = <0x00000000 0x8000000>;
};
gpio-keys {
compatible = "gpio-keys";
#address-cells = <1>;
#size-cells = <0>;
wps {
label = "WPS";

View File

@@ -43,7 +43,7 @@
serial1 = &uart1;
};
memory {
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x10000000>;
};

View File

@@ -43,7 +43,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x80000000>;
};

View File

@@ -43,7 +43,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x80000000>;
};

View File

@@ -43,7 +43,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x40000000>;
};

View File

@@ -43,7 +43,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x80000000>;
};

View File

@@ -43,7 +43,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x80000000>;
};

View File

@@ -43,7 +43,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x20000000>;
};

View File

@@ -42,7 +42,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x80000000>;
};

View File

@@ -16,7 +16,7 @@
stdout-path = &serial0;
};
memory {
memory@0 {
device_type = "memory";
reg = <0x0 0x08000000>;
};

View File

@@ -43,7 +43,7 @@
stdout-path = "serial0:115200n8";
};
memory {
memory@60000000 {
device_type = "memory";
reg = <0x60000000 0x80000000>;
};

View File

@@ -188,6 +188,19 @@
};
};
&cpu {
cpu-supply = <&vdcdc3_reg>;
};
/*
* The standard da850-evm kits and SOM's are 375MHz so enable this operating
* point by default. Higher frequencies must be enabled for custom boards with
* other variants of the SoC.
*/
&opp_375 {
status = "okay";
};
&sata {
status = "okay";
};

View File

@@ -154,12 +154,48 @@
};
};
};
cvdd: regulator0 {
compatible = "regulator-fixed";
regulator-name = "cvdd";
regulator-min-microvolt = <1300000>;
regulator-max-microvolt = <1300000>;
regulator-always-on;
regulator-boot-on;
};
};
&ref_clk {
clock-frequency = <24000000>;
};
&cpu {
cpu-supply = <&cvdd>;
};
/*
* LCDK has a fixed CVDD of 1.3V, so only operating points >= 300MHz are
* valid. Unfortunately due to a problem with the DA8XX OHCI controller, we
* can't enable more than one OPP by default, since the controller sometimes
* becomes unresponsive after a transition. Fix the frequency at 456 MHz.
*/
&opp_100 {
status = "disabled";
};
&opp_200 {
status = "disabled";
};
&opp_300 {
status = "disabled";
};
&opp_456 {
status = "okay";
};
&pmx_core {
status = "okay";

View File

@@ -122,6 +122,15 @@
amp-supply = <&amp>;
};
cvdd: regulator0 {
compatible = "regulator-fixed";
regulator-name = "cvdd";
regulator-min-microvolt = <1200000>;
regulator-max-microvolt = <1200000>;
regulator-always-on;
regulator-boot-on;
};
/*
* This is a 5V current limiting regulator that is shared by USB,
* the sensor (input) ports, the motor (output) ports and the A/DC.
@@ -201,6 +210,27 @@
clock-frequency = <24000000>;
};
&cpu {
cpu-supply = <&cvdd>;
};
/* since we have a fixed regulator, we can't run at these points */
&opp_100 {
status = "disabled";
};
&opp_200 {
status = "disabled";
};
/*
* The SoC is actually the 456MHz version, but because of the fixed regulator
* This is the fastest we can go.
*/
&opp_375 {
status = "okay";
};
&pmx_core {
status = "okay";

View File

@@ -16,6 +16,56 @@
reg = <0xc0000000 0x0>;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu: cpu@0 {
compatible = "arm,arm926ej-s";
device_type = "cpu";
reg = <0>;
clocks = <&psc0 14>;
operating-points-v2 = <&opp_table>;
};
};
opp_table: opp-table {
compatible = "operating-points-v2";
opp_100: opp100-100000000 {
opp-hz = /bits/ 64 <100000000>;
opp-microvolt = <1000000 950000 1050000>;
};
opp_200: opp110-200000000 {
opp-hz = /bits/ 64 <200000000>;
opp-microvolt = <1100000 1050000 1160000>;
};
opp_300: opp120-300000000 {
opp-hz = /bits/ 64 <300000000>;
opp-microvolt = <1200000 1140000 1320000>;
};
/*
* Original silicon was 300MHz max, so higher frequencies
* need to be enabled on a per-board basis if the chip is
* capable.
*/
opp_375: opp120-375000000 {
status = "disabled";
opp-hz = /bits/ 64 <375000000>;
opp-microvolt = <1200000 1140000 1320000>;
};
opp_456: opp130-456000000 {
status = "disabled";
opp-hz = /bits/ 64 <456000000>;
opp-microvolt = <1300000 1250000 1350000>;
};
};
arm {
#address-cells = <1>;
#size-cells = <1>;

View File

@@ -25,7 +25,7 @@
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
bootargs = "ignore_loglevel rw root=/dev/nfs ip=on";
stdout-path = "serial1:115200n8";
};

View File

@@ -59,6 +59,11 @@
cpu0-supply = <&buck2_reg>;
};
&gpu {
mali-supply = <&buck3_reg>;
status = "okay";
};
&i2c_0 {
#address-cells = <1>;
#size-cells = <0>;

View File

@@ -172,6 +172,11 @@
status = "okay";
};
&gpu {
mali-supply = <&buck3_reg>;
status = "okay";
};
&hsotg {
vusb_d-supply = <&ldo15_reg>;
vusb_a-supply = <&ldo12_reg>;

View File

@@ -244,6 +244,11 @@
};
};
&gpu {
mali-supply = <&buck3_reg>;
status = "okay";
};
&i2c_0 {
#address-cells = <1>;
#size-cells = <0>;

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