Merge branch 'remotes/lorenzo/pci/al'
- Add driver for Amazon Annapurna Labs PCIe controller (Jonathan Chocron) - Disable MSI-X since Annapurna Labs advertises it, but it's broken (Jonathan Chocron) - Disable VPD since Annapurna Labs advertises it, but it's broken (Jonathan Chocron) - Add ACS quirk since Annapurna Labs doesn't support ACS but does provide some equivalent protections (Ali Saidi) * remotes/lorenzo/pci/al: PCI: dwc: Add validation that PCIe core is set to correct mode PCI: dwc: al: Add Amazon Annapurna Labs PCIe controller driver dt-bindings: PCI: Add Amazon's Annapurna Labs PCIe host bridge binding PCI: Add quirk to disable MSI-X support for Amazon's Annapurna Labs Root Port PCI/VPD: Prevent VPD access for Amazon's Annapurna Labs Root Port PCI: Add ACS quirk for Amazon Annapurna Labs root ports PCI: Add Amazon's Annapurna Labs vendor ID # Conflicts: # drivers/pci/quirks.c
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46
Documentation/devicetree/bindings/pci/pcie-al.txt
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Documentation/devicetree/bindings/pci/pcie-al.txt
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* Amazon Annapurna Labs PCIe host bridge
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Amazon's Annapurna Labs PCIe Host Controller is based on the Synopsys DesignWare
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PCI core. It inherits common properties defined in
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Documentation/devicetree/bindings/pci/designware-pcie.txt.
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Properties of the host controller node that differ from it are:
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- compatible:
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Usage: required
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Value type: <stringlist>
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Definition: Value should contain
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- "amazon,al-alpine-v2-pcie" for alpine_v2
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- "amazon,al-alpine-v3-pcie" for alpine_v3
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- reg:
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Usage: required
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Value type: <prop-encoded-array>
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Definition: Register ranges as listed in the reg-names property
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- reg-names:
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Usage: required
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Value type: <stringlist>
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Definition: Must include the following entries
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- "config" PCIe ECAM space
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- "controller" AL proprietary registers
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- "dbi" Designware PCIe registers
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Example:
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pcie-external0: pcie@fb600000 {
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compatible = "amazon,al-alpine-v3-pcie";
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reg = <0x0 0xfb600000 0x0 0x00100000
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0x0 0xfd800000 0x0 0x00010000
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0x0 0xfd810000 0x0 0x00001000>;
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reg-names = "config", "controller", "dbi";
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bus-range = <0 255>;
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-map-mask = <0x00 0 0 7>;
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interrupt-map = <0x0000 0 0 1 &gic GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; /* INTa */
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ranges = <0x02000000 0x0 0xc0010000 0x0 0xc0010000 0x0 0x07ff0000>;
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};
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