Merge tag 'drm-for-v4.13' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie: "This is the main pull request for the drm, I think I've got one later driver pull for mediatek SoC driver, I'm undecided on if it needs to go to you yet. Otherwise summary below: Core drm: - Atomic add driver private objects - Deprecate preclose hook in modern drivers - MST bandwidth tracking - Use kvmalloc in more places - Add mode_valid hook for crtc/encoder/bridge - Reduce sync_file construction time - Documentation updates - New DRM synchronisation object support New drivers: - pl111 - pl111 CLCD display controller Panel: - Innolux P079ZCA panel driver - Add NL12880B20-05, NL192108AC18-02D, P320HVN03 panels - panel-samsung-s6e3ha2: Add s6e3hf2 panel support i915: - SKL+ watermark fixes - G4x/G33 reset improvements - DP AUX backlight improvements - Buffer based GuC/host communication - New getparam for (sub)slice infomation - Cannonlake and Coffeelake initial patches - Execbuf optimisations radeon/amdgpu: - Lots of Vega10 bug fixes - Preliminary raven support - KIQ support for compute rings - MEC queue management rework - DCE6 Audio support - SR-IOV improvements - Better radeon/amdgpu selection support nouveau: - HDMI stereoscopic support - Display code rework for >= GM20x GPUs msm: - GEM rework for fine-grained locking - Per-process pagetable work - HDMI fixes for Snapdragon 820. vc4: - Remove 256MB CMA limit from vc4 - Add out-fence support - Add support for cygnus - Get/set tiling ioctls support - Add T-format tiling support for scanout zte: - add VGA support. etnaviv: - Thermal throttle support for newer GPUs - Restore userspace buffer cache performance - dma-buf sync fix stm: - add stm32f429 display support exynos: - Rework vblank handling - Fixup sw-trigger code sun4i: - V3s display engine support - HDMI support for older SoCs - Preliminary work on dual-pipeline SoCs. rcar-du: - VSP work imx-drm: - Remove counter load enable from PRE - Double read/write reduction flag support tegra: - Documentation for the host1x and drm driver. - Lots of staging ioctl fixes due to grate project work. omapdrm: - dma-buf fence support - TILER rotation fixes" * tag 'drm-for-v4.13' of git://people.freedesktop.org/~airlied/linux: (1270 commits) drm: Remove unused drm_file parameter to drm_syncobj_replace_fence() drm/amd/powerplay: fix bug fail to remove sysfs when rmmod amdgpu. amdgpu: Set cik/si_support to 1 by default if radeon isn't built drm/amdgpu/gfx9: fix driver reload with KIQ drm/amdgpu/gfx8: fix driver reload with KIQ drm/amdgpu: Don't call amd_powerplay_destroy() if we don't have powerplay drm/ttm: Fix use-after-free in ttm_bo_clean_mm drm/amd/amdgpu: move get memory type function from early init to sw init drm/amdgpu/cgs: always set reference clock in mode_info drm/amdgpu: fix vblank_time when displays are off drm/amd/powerplay: power value format change for Vega10 drm/amdgpu/gfx9: support the amdgpu.disable_cu option drm/amd/powerplay: change PPSMC_MSG_GetCurrPkgPwr for Vega10 drm/amdgpu: Make amdgpu_cs_parser_init static (v2) drm/amdgpu/cs: fix a typo in a comment drm/amdgpu: Fix the exported always on CU bitmap drm/amdgpu/gfx9: gfx_v9_0_enable_gfx_static_mg_power_gating() can be static drm/amdgpu/psp: upper_32_bits/lower_32_bits for address setup drm/amd/powerplay/cz: print message if smc message fails drm/amdgpu: fix typo in amdgpu_debugfs_test_ib_init ...
This commit is contained in:
86
include/linux/amba/clcd-regs.h
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86
include/linux/amba/clcd-regs.h
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@@ -0,0 +1,86 @@
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/*
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* David A Rusling
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*
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* Copyright (C) 2001 ARM Limited
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive
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* for more details.
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*/
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#ifndef AMBA_CLCD_REGS_H
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#define AMBA_CLCD_REGS_H
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/*
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* CLCD Controller Internal Register addresses
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*/
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#define CLCD_TIM0 0x00000000
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#define CLCD_TIM1 0x00000004
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#define CLCD_TIM2 0x00000008
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#define CLCD_TIM3 0x0000000c
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#define CLCD_UBAS 0x00000010
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#define CLCD_LBAS 0x00000014
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#define CLCD_PL110_IENB 0x00000018
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#define CLCD_PL110_CNTL 0x0000001c
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#define CLCD_PL110_STAT 0x00000020
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#define CLCD_PL110_INTR 0x00000024
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#define CLCD_PL110_UCUR 0x00000028
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#define CLCD_PL110_LCUR 0x0000002C
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#define CLCD_PL111_CNTL 0x00000018
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#define CLCD_PL111_IENB 0x0000001c
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#define CLCD_PL111_RIS 0x00000020
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#define CLCD_PL111_MIS 0x00000024
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#define CLCD_PL111_ICR 0x00000028
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#define CLCD_PL111_UCUR 0x0000002c
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#define CLCD_PL111_LCUR 0x00000030
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#define CLCD_PALL 0x00000200
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#define CLCD_PALETTE 0x00000200
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#define TIM2_PCD_LO_MASK GENMASK(4, 0)
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#define TIM2_PCD_LO_BITS 5
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#define TIM2_CLKSEL (1 << 5)
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#define TIM2_IVS (1 << 11)
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#define TIM2_IHS (1 << 12)
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#define TIM2_IPC (1 << 13)
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#define TIM2_IOE (1 << 14)
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#define TIM2_BCD (1 << 26)
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#define TIM2_PCD_HI_MASK GENMASK(31, 27)
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#define TIM2_PCD_HI_BITS 5
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#define TIM2_PCD_HI_SHIFT 27
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#define CNTL_LCDEN (1 << 0)
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#define CNTL_LCDBPP1 (0 << 1)
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#define CNTL_LCDBPP2 (1 << 1)
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#define CNTL_LCDBPP4 (2 << 1)
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#define CNTL_LCDBPP8 (3 << 1)
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#define CNTL_LCDBPP16 (4 << 1)
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#define CNTL_LCDBPP16_565 (6 << 1)
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#define CNTL_LCDBPP16_444 (7 << 1)
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#define CNTL_LCDBPP24 (5 << 1)
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#define CNTL_LCDBW (1 << 4)
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#define CNTL_LCDTFT (1 << 5)
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#define CNTL_LCDMONO8 (1 << 6)
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#define CNTL_LCDDUAL (1 << 7)
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#define CNTL_BGR (1 << 8)
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#define CNTL_BEBO (1 << 9)
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#define CNTL_BEPO (1 << 10)
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#define CNTL_LCDPWR (1 << 11)
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#define CNTL_LCDVCOMP(x) ((x) << 12)
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#define CNTL_LDMAFIFOTIME (1 << 15)
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#define CNTL_WATERMARK (1 << 16)
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/* ST Microelectronics variant bits */
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#define CNTL_ST_1XBPP_444 0x0
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#define CNTL_ST_1XBPP_5551 (1 << 17)
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#define CNTL_ST_1XBPP_565 (1 << 18)
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#define CNTL_ST_CDWID_12 0x0
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#define CNTL_ST_CDWID_16 (1 << 19)
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#define CNTL_ST_CDWID_18 (1 << 20)
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#define CNTL_ST_CDWID_24 ((1 << 19)|(1 << 20))
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#define CNTL_ST_CEAEN (1 << 21)
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#define CNTL_ST_LCDBPP24_PACKED (6 << 1)
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#endif /* AMBA_CLCD_REGS_H */
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@@ -10,73 +10,7 @@
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* for more details.
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*/
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#include <linux/fb.h>
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/*
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* CLCD Controller Internal Register addresses
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*/
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#define CLCD_TIM0 0x00000000
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#define CLCD_TIM1 0x00000004
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#define CLCD_TIM2 0x00000008
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#define CLCD_TIM3 0x0000000c
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#define CLCD_UBAS 0x00000010
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#define CLCD_LBAS 0x00000014
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#define CLCD_PL110_IENB 0x00000018
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#define CLCD_PL110_CNTL 0x0000001c
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#define CLCD_PL110_STAT 0x00000020
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#define CLCD_PL110_INTR 0x00000024
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#define CLCD_PL110_UCUR 0x00000028
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#define CLCD_PL110_LCUR 0x0000002C
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#define CLCD_PL111_CNTL 0x00000018
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#define CLCD_PL111_IENB 0x0000001c
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#define CLCD_PL111_RIS 0x00000020
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#define CLCD_PL111_MIS 0x00000024
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#define CLCD_PL111_ICR 0x00000028
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#define CLCD_PL111_UCUR 0x0000002c
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#define CLCD_PL111_LCUR 0x00000030
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#define CLCD_PALL 0x00000200
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#define CLCD_PALETTE 0x00000200
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#define TIM2_CLKSEL (1 << 5)
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#define TIM2_IVS (1 << 11)
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#define TIM2_IHS (1 << 12)
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#define TIM2_IPC (1 << 13)
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#define TIM2_IOE (1 << 14)
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#define TIM2_BCD (1 << 26)
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#define CNTL_LCDEN (1 << 0)
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#define CNTL_LCDBPP1 (0 << 1)
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#define CNTL_LCDBPP2 (1 << 1)
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#define CNTL_LCDBPP4 (2 << 1)
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#define CNTL_LCDBPP8 (3 << 1)
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#define CNTL_LCDBPP16 (4 << 1)
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#define CNTL_LCDBPP16_565 (6 << 1)
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#define CNTL_LCDBPP16_444 (7 << 1)
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#define CNTL_LCDBPP24 (5 << 1)
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#define CNTL_LCDBW (1 << 4)
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#define CNTL_LCDTFT (1 << 5)
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#define CNTL_LCDMONO8 (1 << 6)
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#define CNTL_LCDDUAL (1 << 7)
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#define CNTL_BGR (1 << 8)
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#define CNTL_BEBO (1 << 9)
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#define CNTL_BEPO (1 << 10)
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#define CNTL_LCDPWR (1 << 11)
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#define CNTL_LCDVCOMP(x) ((x) << 12)
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#define CNTL_LDMAFIFOTIME (1 << 15)
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#define CNTL_WATERMARK (1 << 16)
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/* ST Microelectronics variant bits */
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#define CNTL_ST_1XBPP_444 0x0
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#define CNTL_ST_1XBPP_5551 (1 << 17)
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#define CNTL_ST_1XBPP_565 (1 << 18)
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#define CNTL_ST_CDWID_12 0x0
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#define CNTL_ST_CDWID_16 (1 << 19)
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#define CNTL_ST_CDWID_18 (1 << 20)
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#define CNTL_ST_CDWID_24 ((1 << 19)|(1 << 20))
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#define CNTL_ST_CEAEN (1 << 21)
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#define CNTL_ST_LCDBPP24_PACKED (6 << 1)
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#include <linux/amba/clcd-regs.h>
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enum {
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/* individual formats */
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@@ -32,11 +32,27 @@ enum host1x_class {
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struct host1x_client;
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/**
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* struct host1x_client_ops - host1x client operations
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* @init: host1x client initialization code
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* @exit: host1x client tear down code
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*/
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struct host1x_client_ops {
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int (*init)(struct host1x_client *client);
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int (*exit)(struct host1x_client *client);
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};
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/**
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* struct host1x_client - host1x client structure
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* @list: list node for the host1x client
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* @parent: pointer to struct device representing the host1x controller
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* @dev: pointer to struct device backing this host1x client
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* @ops: host1x client operations
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* @class: host1x class represented by this client
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* @channel: host1x channel associated with this client
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* @syncpts: array of syncpoints requested for this client
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* @num_syncpts: number of syncpoints requested for this client
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*/
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struct host1x_client {
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struct list_head list;
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struct device *parent;
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@@ -156,7 +172,6 @@ struct host1x_channel;
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struct host1x_job;
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struct host1x_channel *host1x_channel_request(struct device *dev);
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void host1x_channel_free(struct host1x_channel *channel);
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struct host1x_channel *host1x_channel_get(struct host1x_channel *channel);
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void host1x_channel_put(struct host1x_channel *channel);
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int host1x_job_submit(struct host1x_job *job);
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@@ -177,6 +192,13 @@ struct host1x_reloc {
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unsigned long shift;
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};
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struct host1x_waitchk {
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struct host1x_bo *bo;
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u32 offset;
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u32 syncpt_id;
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u32 thresh;
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};
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struct host1x_job {
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/* When refcount goes to zero, job can be freed */
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struct kref ref;
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@@ -226,7 +248,10 @@ struct host1x_job {
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u8 *gather_copy_mapped;
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/* Check if register is marked as an address reg */
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int (*is_addr_reg)(struct device *dev, u32 reg, u32 class);
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int (*is_addr_reg)(struct device *dev, u32 class, u32 reg);
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/* Check if class belongs to the unit */
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int (*is_valid_class)(u32 class);
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/* Request a SETCLASS to this class */
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u32 class;
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@@ -251,6 +276,15 @@ void host1x_job_unpin(struct host1x_job *job);
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struct host1x_device;
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/**
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* struct host1x_driver - host1x logical device driver
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* @driver: core driver
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* @subdevs: table of OF device IDs matching subdevices for this driver
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* @list: list node for the driver
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* @probe: called when the host1x logical device is probed
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* @remove: called when the host1x logical device is removed
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* @shutdown: called when the host1x logical device is shut down
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*/
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struct host1x_driver {
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struct device_driver driver;
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@@ -27,7 +27,6 @@ enum omapdss_version {
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/* Board specific data */
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struct omap_dss_board_info {
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const char *default_display_name;
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int (*dsi_enable_pads)(int dsi_id, unsigned int lane_mask);
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void (*dsi_disable_pads)(int dsi_id, unsigned int lane_mask);
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int (*set_min_bus_tput)(struct device *dev, unsigned long r);
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#define _LINUX_SYNC_FILE_H
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#include <linux/types.h>
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#include <linux/kref.h>
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#include <linux/ktime.h>
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#include <linux/list.h>
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#include <linux/spinlock.h>
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@@ -24,8 +23,6 @@
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/**
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* struct sync_file - sync file to export to the userspace
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* @file: file representing this fence
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* @kref: reference count on fence.
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* @name: name of sync_file. Useful for debugging
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* @sync_file_list: membership in global file list
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* @wq: wait queue for fence signaling
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* @fence: fence with the fences in the sync_file
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@@ -33,8 +30,14 @@
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*/
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struct sync_file {
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struct file *file;
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struct kref kref;
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char name[32];
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/**
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* @user_name:
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*
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* Name of the sync file provided by userspace, for merged fences.
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* Otherwise generated through driver callbacks (in which case the
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* entire array is 0).
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*/
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char user_name[32];
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#ifdef CONFIG_DEBUG_FS
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struct list_head sync_file_list;
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#endif
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@@ -49,5 +52,6 @@ struct sync_file {
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struct sync_file *sync_file_create(struct dma_fence *fence);
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struct dma_fence *sync_file_get_fence(int fd);
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char *sync_file_get_name(struct sync_file *sync_file, char *buf, int len);
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#endif /* _LINUX_SYNC_H */
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