Merge tag 'drm-for-v4.13' of git://people.freedesktop.org/~airlied/linux
Pull drm updates from Dave Airlie: "This is the main pull request for the drm, I think I've got one later driver pull for mediatek SoC driver, I'm undecided on if it needs to go to you yet. Otherwise summary below: Core drm: - Atomic add driver private objects - Deprecate preclose hook in modern drivers - MST bandwidth tracking - Use kvmalloc in more places - Add mode_valid hook for crtc/encoder/bridge - Reduce sync_file construction time - Documentation updates - New DRM synchronisation object support New drivers: - pl111 - pl111 CLCD display controller Panel: - Innolux P079ZCA panel driver - Add NL12880B20-05, NL192108AC18-02D, P320HVN03 panels - panel-samsung-s6e3ha2: Add s6e3hf2 panel support i915: - SKL+ watermark fixes - G4x/G33 reset improvements - DP AUX backlight improvements - Buffer based GuC/host communication - New getparam for (sub)slice infomation - Cannonlake and Coffeelake initial patches - Execbuf optimisations radeon/amdgpu: - Lots of Vega10 bug fixes - Preliminary raven support - KIQ support for compute rings - MEC queue management rework - DCE6 Audio support - SR-IOV improvements - Better radeon/amdgpu selection support nouveau: - HDMI stereoscopic support - Display code rework for >= GM20x GPUs msm: - GEM rework for fine-grained locking - Per-process pagetable work - HDMI fixes for Snapdragon 820. vc4: - Remove 256MB CMA limit from vc4 - Add out-fence support - Add support for cygnus - Get/set tiling ioctls support - Add T-format tiling support for scanout zte: - add VGA support. etnaviv: - Thermal throttle support for newer GPUs - Restore userspace buffer cache performance - dma-buf sync fix stm: - add stm32f429 display support exynos: - Rework vblank handling - Fixup sw-trigger code sun4i: - V3s display engine support - HDMI support for older SoCs - Preliminary work on dual-pipeline SoCs. rcar-du: - VSP work imx-drm: - Remove counter load enable from PRE - Double read/write reduction flag support tegra: - Documentation for the host1x and drm driver. - Lots of staging ioctl fixes due to grate project work. omapdrm: - dma-buf fence support - TILER rotation fixes" * tag 'drm-for-v4.13' of git://people.freedesktop.org/~airlied/linux: (1270 commits) drm: Remove unused drm_file parameter to drm_syncobj_replace_fence() drm/amd/powerplay: fix bug fail to remove sysfs when rmmod amdgpu. amdgpu: Set cik/si_support to 1 by default if radeon isn't built drm/amdgpu/gfx9: fix driver reload with KIQ drm/amdgpu/gfx8: fix driver reload with KIQ drm/amdgpu: Don't call amd_powerplay_destroy() if we don't have powerplay drm/ttm: Fix use-after-free in ttm_bo_clean_mm drm/amd/amdgpu: move get memory type function from early init to sw init drm/amdgpu/cgs: always set reference clock in mode_info drm/amdgpu: fix vblank_time when displays are off drm/amd/powerplay: power value format change for Vega10 drm/amdgpu/gfx9: support the amdgpu.disable_cu option drm/amd/powerplay: change PPSMC_MSG_GetCurrPkgPwr for Vega10 drm/amdgpu: Make amdgpu_cs_parser_init static (v2) drm/amdgpu/cs: fix a typo in a comment drm/amdgpu: Fix the exported always on CU bitmap drm/amdgpu/gfx9: gfx_v9_0_enable_gfx_static_mg_power_gating() can be static drm/amdgpu/psp: upper_32_bits/lower_32_bits for address setup drm/amd/powerplay/cz: print message if smc message fails drm/amdgpu: fix typo in amdgpu_debugfs_test_ib_init ...
This commit is contained in:
Linus Torvalds
@@ -98,6 +98,9 @@ DRIVER_ATOMIC
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implement appropriate obj->atomic_get_property() vfuncs for any
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modeset objects with driver specific properties.
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DRIVER_SYNCOBJ
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Driver support drm sync objects.
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Major, Minor and Patchlevel
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~~~~~~~~~~~~~~~~~~~~~~~~~~~
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@@ -149,60 +152,15 @@ Device Instance and Driver Handling
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Driver Load
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-----------
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IRQ Registration
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~~~~~~~~~~~~~~~~
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The DRM core tries to facilitate IRQ handler registration and
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unregistration by providing :c:func:`drm_irq_install()` and
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:c:func:`drm_irq_uninstall()` functions. Those functions only
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support a single interrupt per device, devices that use more than one
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IRQs need to be handled manually.
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IRQ Helper Library
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~~~~~~~~~~~~~~~~~~
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Managed IRQ Registration
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''''''''''''''''''''''''
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.. kernel-doc:: drivers/gpu/drm/drm_irq.c
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:doc: irq helpers
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:c:func:`drm_irq_install()` starts by calling the irq_preinstall
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driver operation. The operation is optional and must make sure that the
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interrupt will not get fired by clearing all pending interrupt flags or
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disabling the interrupt.
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The passed-in IRQ will then be requested by a call to
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:c:func:`request_irq()`. If the DRIVER_IRQ_SHARED driver feature
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flag is set, a shared (IRQF_SHARED) IRQ handler will be requested.
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The IRQ handler function must be provided as the mandatory irq_handler
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driver operation. It will get passed directly to
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:c:func:`request_irq()` and thus has the same prototype as all IRQ
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handlers. It will get called with a pointer to the DRM device as the
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second argument.
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Finally the function calls the optional irq_postinstall driver
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operation. The operation usually enables interrupts (excluding the
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vblank interrupt, which is enabled separately), but drivers may choose
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to enable/disable interrupts at a different time.
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:c:func:`drm_irq_uninstall()` is similarly used to uninstall an
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IRQ handler. It starts by waking up all processes waiting on a vblank
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interrupt to make sure they don't hang, and then calls the optional
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irq_uninstall driver operation. The operation must disable all hardware
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interrupts. Finally the function frees the IRQ by calling
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:c:func:`free_irq()`.
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Manual IRQ Registration
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'''''''''''''''''''''''
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Drivers that require multiple interrupt handlers can't use the managed
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IRQ registration functions. In that case IRQs must be registered and
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unregistered manually (usually with the :c:func:`request_irq()` and
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:c:func:`free_irq()` functions, or their :c:func:`devm_request_irq()` and
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:c:func:`devm_free_irq()` equivalents).
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When manually registering IRQs, drivers must not set the
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DRIVER_HAVE_IRQ driver feature flag, and must not provide the
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irq_handler driver operation. They must set the :c:type:`struct
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drm_device <drm_device>` irq_enabled field to 1 upon
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registration of the IRQs, and clear it to 0 after unregistering the
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IRQs.
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.. kernel-doc:: drivers/gpu/drm/drm_irq.c
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:export:
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Memory Manager Initialization
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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@@ -143,6 +143,12 @@ Bridge Helper Reference
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.. kernel-doc:: drivers/gpu/drm/drm_bridge.c
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:export:
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Panel-Bridge Helper Reference
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-----------------------------
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.. kernel-doc:: drivers/gpu/drm/bridge/panel.c
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:export:
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.. _drm_panel_helper:
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Panel Helper Reference
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@@ -612,8 +612,8 @@ operation handler.
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Vertical Blanking and Interrupt Handling Functions Reference
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------------------------------------------------------------
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.. kernel-doc:: include/drm/drm_irq.h
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.. kernel-doc:: include/drm/drm_vblank.h
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:internal:
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.. kernel-doc:: drivers/gpu/drm/drm_irq.c
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.. kernel-doc:: drivers/gpu/drm/drm_vblank.c
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:export:
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@@ -484,3 +484,15 @@ DRM Cache Handling
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.. kernel-doc:: drivers/gpu/drm/drm_cache.c
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:export:
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DRM Sync Objects
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===========================
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.. kernel-doc:: drivers/gpu/drm/drm_syncobj.c
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:doc: Overview
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.. kernel-doc:: include/drm/drm_syncobj.h
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:export:
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.. kernel-doc:: drivers/gpu/drm/drm_syncobj.c
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:export:
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@@ -12,6 +12,8 @@ Linux GPU Driver Developer's Guide
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drm-uapi
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i915
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meson
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pl111
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tegra
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tinydrm
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vc4
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vga-switcheroo
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6
Documentation/gpu/pl111.rst
Normal file
6
Documentation/gpu/pl111.rst
Normal file
@@ -0,0 +1,6 @@
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==========================================
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drm/pl111 ARM PrimeCell PL111 CLCD Driver
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==========================================
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.. kernel-doc:: drivers/gpu/drm/pl111/pl111_drv.c
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:doc: ARM PrimeCell PL111 CLCD Driver
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178
Documentation/gpu/tegra.rst
Normal file
178
Documentation/gpu/tegra.rst
Normal file
@@ -0,0 +1,178 @@
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===============================================
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drm/tegra NVIDIA Tegra GPU and display driver
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===============================================
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NVIDIA Tegra SoCs support a set of display, graphics and video functions via
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the host1x controller. host1x supplies command streams, gathered from a push
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buffer provided directly by the CPU, to its clients via channels. Software,
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or blocks amongst themselves, can use syncpoints for synchronization.
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Up until, but not including, Tegra124 (aka Tegra K1) the drm/tegra driver
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supports the built-in GPU, comprised of the gr2d and gr3d engines. Starting
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with Tegra124 the GPU is based on the NVIDIA desktop GPU architecture and
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supported by the drm/nouveau driver.
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The drm/tegra driver supports NVIDIA Tegra SoC generations since Tegra20. It
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has three parts:
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- A host1x driver that provides infrastructure and access to the host1x
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services.
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- A KMS driver that supports the display controllers as well as a number of
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outputs, such as RGB, HDMI, DSI, and DisplayPort.
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- A set of custom userspace IOCTLs that can be used to submit jobs to the
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GPU and video engines via host1x.
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Driver Infrastructure
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=====================
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The various host1x clients need to be bound together into a logical device in
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order to expose their functionality to users. The infrastructure that supports
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this is implemented in the host1x driver. When a driver is registered with the
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infrastructure it provides a list of compatible strings specifying the devices
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that it needs. The infrastructure creates a logical device and scan the device
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tree for matching device nodes, adding the required clients to a list. Drivers
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for individual clients register with the infrastructure as well and are added
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to the logical host1x device.
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Once all clients are available, the infrastructure will initialize the logical
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device using a driver-provided function which will set up the bits specific to
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the subsystem and in turn initialize each of its clients.
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Similarly, when one of the clients is unregistered, the infrastructure will
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destroy the logical device by calling back into the driver, which ensures that
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the subsystem specific bits are torn down and the clients destroyed in turn.
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Host1x Infrastructure Reference
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-------------------------------
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.. kernel-doc:: include/linux/host1x.h
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.. kernel-doc:: drivers/gpu/host1x/bus.c
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:export:
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Host1x Syncpoint Reference
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--------------------------
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.. kernel-doc:: drivers/gpu/host1x/syncpt.c
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:export:
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KMS driver
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==========
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The display hardware has remained mostly backwards compatible over the various
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Tegra SoC generations, up until Tegra186 which introduces several changes that
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make it difficult to support with a parameterized driver.
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Display Controllers
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-------------------
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Tegra SoCs have two display controllers, each of which can be associated with
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zero or more outputs. Outputs can also share a single display controller, but
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only if they run with compatible display timings. Two display controllers can
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also share a single framebuffer, allowing cloned configurations even if modes
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on two outputs don't match. A display controller is modelled as a CRTC in KMS
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terms.
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On Tegra186, the number of display controllers has been increased to three. A
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display controller can no longer drive all of the outputs. While two of these
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controllers can drive both DSI outputs and both SOR outputs, the third cannot
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drive any DSI.
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Windows
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~~~~~~~
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A display controller controls a set of windows that can be used to composite
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multiple buffers onto the screen. While it is possible to assign arbitrary Z
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ordering to individual windows (by programming the corresponding blending
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registers), this is currently not supported by the driver. Instead, it will
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assume a fixed Z ordering of the windows (window A is the root window, that
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is, the lowest, while windows B and C are overlaid on top of window A). The
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overlay windows support multiple pixel formats and can automatically convert
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from YUV to RGB at scanout time. This makes them useful for displaying video
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content. In KMS, each window is modelled as a plane. Each display controller
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has a hardware cursor that is exposed as a cursor plane.
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Outputs
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-------
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The type and number of supported outputs varies between Tegra SoC generations.
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All generations support at least HDMI. While earlier generations supported the
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very simple RGB interfaces (one per display controller), recent generations no
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longer do and instead provide standard interfaces such as DSI and eDP/DP.
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Outputs are modelled as a composite encoder/connector pair.
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RGB/LVDS
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~~~~~~~~
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This interface is no longer available since Tegra124. It has been replaced by
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the more standard DSI and eDP interfaces.
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HDMI
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~~~~
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HDMI is supported on all Tegra SoCs. Starting with Tegra210, HDMI is provided
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by the versatile SOR output, which supports eDP, DP and HDMI. The SOR is able
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to support HDMI 2.0, though support for this is currently not merged.
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DSI
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~~~
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Although Tegra has supported DSI since Tegra30, the controller has changed in
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several ways in Tegra114. Since none of the publicly available development
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boards prior to Dalmore (Tegra114) have made use of DSI, only Tegra114 and
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later are supported by the drm/tegra driver.
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eDP/DP
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~~~~~~
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eDP was first introduced in Tegra124 where it was used to drive the display
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panel for notebook form factors. Tegra210 added support for full DisplayPort
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support, though this is currently not implemented in the drm/tegra driver.
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Userspace Interface
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===================
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The userspace interface provided by drm/tegra allows applications to create
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GEM buffers, access and control syncpoints as well as submit command streams
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to host1x.
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GEM Buffers
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-----------
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The ``DRM_IOCTL_TEGRA_GEM_CREATE`` IOCTL is used to create a GEM buffer object
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with Tegra-specific flags. This is useful for buffers that should be tiled, or
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that are to be scanned out upside down (useful for 3D content).
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After a GEM buffer object has been created, its memory can be mapped by an
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application using the mmap offset returned by the ``DRM_IOCTL_TEGRA_GEM_MMAP``
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IOCTL.
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Syncpoints
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----------
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The current value of a syncpoint can be obtained by executing the
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``DRM_IOCTL_TEGRA_SYNCPT_READ`` IOCTL. Incrementing the syncpoint is achieved
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using the ``DRM_IOCTL_TEGRA_SYNCPT_INCR`` IOCTL.
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Userspace can also request blocking on a syncpoint. To do so, it needs to
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execute the ``DRM_IOCTL_TEGRA_SYNCPT_WAIT`` IOCTL, specifying the value of
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the syncpoint to wait for. The kernel will release the application when the
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syncpoint reaches that value or after a specified timeout.
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Command Stream Submission
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-------------------------
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Before an application can submit command streams to host1x it needs to open a
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channel to an engine using the ``DRM_IOCTL_TEGRA_OPEN_CHANNEL`` IOCTL. Client
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IDs are used to identify the target of the channel. When a channel is no
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longer needed, it can be closed using the ``DRM_IOCTL_TEGRA_CLOSE_CHANNEL``
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IOCTL. To retrieve the syncpoint associated with a channel, an application
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can use the ``DRM_IOCTL_TEGRA_GET_SYNCPT``.
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After opening a channel, submitting command streams is easy. The application
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writes commands into the memory backing a GEM buffer object and passes these
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to the ``DRM_IOCTL_TEGRA_SUBMIT`` IOCTL along with various other parameters,
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such as the syncpoints or relocations used in the job submission.
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@@ -177,19 +177,6 @@ following drivers still use ``struct_mutex``: ``msm``, ``omapdrm`` and
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Contact: Daniel Vetter, respective driver maintainers
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Switch to drm_connector_list_iter for any connector_list walking
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----------------------------------------------------------------
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Connectors can be hotplugged, and we now have a special list of helpers to walk
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the connector_list in a race-free fashion, without incurring deadlocks on
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mutexes and other fun stuff.
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Unfortunately most drivers are not converted yet. At least all those supporting
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DP MST hotplug should be converted, since for those drivers the difference
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matters. See drm_for_each_connector_iter() vs. drm_for_each_connector().
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Contact: Daniel Vetter
|
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Core refactorings
|
||||
=================
|
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|
||||
|
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Reference in New Issue
Block a user