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drm/i915/icl: fix gmbus gpio pin mapping

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ICP has GPIO pin 1/2 mapped to combo-phy ports & GPIO pins 9/10/11/12
mapped to tc ports[1-4].
This patch defines GPIOCTL registers for GPIO pins 9-12 & uses them in GPIO
pin mapping table.

Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: Madhav Chauhan <madhav.chauhan@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180612002512.29783-1-paulo.r.zanoni@intel.com
This commit is contained in:
Mahesh Kumar
2018-06-11 17:25:11 -07:00
committed by Paulo Zanoni
parent dccc7228b5
commit af1f1b8113
3 changed files with 11 additions and 7 deletions
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12
drivers/gpu/drm/i915/intel_i2c.c
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@@ -77,12 +77,12 @@ static const struct gmbus_pin gmbus_pins_cnp[] = {
};
static const struct gmbus_pin gmbus_pins_icp[] = {
[GMBUS_PIN_1_BXT] = { "dpa", GPIOA },
[GMBUS_PIN_2_BXT] = { "dpb", GPIOB },
[GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIOC },
[GMBUS_PIN_10_TC2_ICP] = { "tc2", GPIOD },
[GMBUS_PIN_11_TC3_ICP] = { "tc3", GPIOE },
[GMBUS_PIN_12_TC4_ICP] = { "tc4", GPIOF },
[GMBUS_PIN_1_BXT] = { "dpa", GPIOB },
[GMBUS_PIN_2_BXT] = { "dpb", GPIOC },
[GMBUS_PIN_9_TC1_ICP] = { "tc1", GPIOJ },
[GMBUS_PIN_10_TC2_ICP] = { "tc2", GPIOK },
[GMBUS_PIN_11_TC3_ICP] = { "tc3", GPIOL },
[GMBUS_PIN_12_TC4_ICP] = { "tc4", GPIOM },
};
/* pin is expected to be valid */