drm/radeon/kms: add atom helper functions for dpm (v3)
dpm needs access to atombios data and command tables for setup and calculation of a number of parameters. v2: endian fix v3: fix mc reg table bug Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@@ -519,6 +519,63 @@ struct atom_clock_dividers {
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u32 flags;
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};
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#define MEM_TYPE_GDDR5 0x50
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#define MEM_TYPE_GDDR4 0x40
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#define MEM_TYPE_GDDR3 0x30
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#define MEM_TYPE_DDR2 0x20
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#define MEM_TYPE_GDDR1 0x10
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#define MEM_TYPE_DDR3 0xb0
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#define MEM_TYPE_MASK 0xf0
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struct atom_memory_info {
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u8 mem_vendor;
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u8 mem_type;
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};
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#define MAX_AC_TIMING_ENTRIES 16
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struct atom_memory_clock_range_table
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{
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u8 num_entries;
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u8 rsv[3];
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u32 mclk[MAX_AC_TIMING_ENTRIES];
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};
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#define VBIOS_MC_REGISTER_ARRAY_SIZE 32
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#define VBIOS_MAX_AC_TIMING_ENTRIES 20
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struct atom_mc_reg_entry {
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u32 mclk_max;
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u32 mc_data[VBIOS_MC_REGISTER_ARRAY_SIZE];
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};
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struct atom_mc_register_address {
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u16 s1;
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u8 pre_reg_data;
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};
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struct atom_mc_reg_table {
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u8 last;
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u8 num_entries;
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struct atom_mc_reg_entry mc_reg_table_entry[VBIOS_MAX_AC_TIMING_ENTRIES];
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struct atom_mc_register_address mc_reg_address[VBIOS_MC_REGISTER_ARRAY_SIZE];
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};
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#define MAX_VOLTAGE_ENTRIES 32
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struct atom_voltage_table_entry
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{
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u16 value;
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u32 smio_low;
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};
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struct atom_voltage_table
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{
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u32 count;
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u32 mask_low;
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struct atom_voltage_table_entry entries[MAX_VOLTAGE_ENTRIES];
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};
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extern enum radeon_tv_std
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radeon_combios_get_tv_info(struct radeon_device *rdev);
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extern enum radeon_tv_std
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