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MIPS: Alchemy: Convert dbdma.c to syscore_ops

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Convert the PM sysdev to syscore_ops and clean up the ddma addresses a bit.

Signed-off-by: Manuel Lauss <manuel.lauss@googlemail.com>
To: Linux-MIPS <linux-mips@linux-mips.org>
Cc: Florian Fainelli <florian@openwrt.org>
Cc: Wolfgang Grandegger <wg@grandegger.com>
Patchwork: https://patchwork.linux-mips.org/patch/2351/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Manuel Lauss
2011-05-08 10:42:16 +02:00
committed by Ralf Baechle
parent 4b5c82b5e5
commit adcb86279f
3 changed files with 47 additions and 88 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
arch/mips/include/asm/mach-au1x00/au1000.h
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@@ -635,6 +635,8 @@ enum soc_au1200_ints {
#define AU1000_IC0_PHYS_ADDR 0x10400000 /* 01234 */
#define AU1000_IC1_PHYS_ADDR 0x11800000 /* 01234 */
#define AU1550_DBDMA_PHYS_ADDR 0x14002000 /* 34 */
#define AU1550_DBDMA_CONF_PHYS_ADDR 0x14003000 /* 34 */
#ifdef CONFIG_SOC_AU1000
@@ -761,7 +763,6 @@ enum soc_au1200_ints {
#define UART3_PHYS_ADDR 0x11400000
#define GPIO2_PHYS_ADDR 0x11700000
#define SYS_PHYS_ADDR 0x11900000
#define DDMA_PHYS_ADDR 0x14002000
#define PE_PHYS_ADDR 0x14008000
#define PSC0_PHYS_ADDR 0x11A00000
#define PSC1_PHYS_ADDR 0x11B00000
@@ -789,7 +790,6 @@ enum soc_au1200_ints {
#define UART1_PHYS_ADDR 0x11200000
#define GPIO2_PHYS_ADDR 0x11700000
#define SYS_PHYS_ADDR 0x11900000
#define DDMA_PHYS_ADDR 0x14002000
#define PSC0_PHYS_ADDR 0x11A00000
#define PSC1_PHYS_ADDR 0x11B00000
#define SD0_PHYS_ADDR 0x10600000

8
arch/mips/include/asm/mach-au1x00/au1xxx_dbdma.h
View File

@@ -37,14 +37,6 @@
#ifndef _LANGUAGE_ASSEMBLY
/*
* The DMA base addresses.
* The channels are every 256 bytes (0x0100) from the channel 0 base.
* Interrupt status/enable is bits 15:0 for channels 15 to zero.
*/
#define DDMA_GLOBAL_BASE 0xb4003000
#define DDMA_CHANNEL_BASE 0xb4002000
typedef volatile struct dbdma_global {
u32 ddma_config;
u32 ddma_intstat;