e1000e: reformat comment blocks, cosmetic changes only
Adjusting the comment blocks here to be code-style compliant. no code changes. Changed some copyright dates to 2008. Indentation fixes. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
@@ -1,7 +1,7 @@
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/*******************************************************************************
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Intel PRO/1000 Linux driver
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Copyright(c) 1999 - 2007 Intel Corporation.
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Copyright(c) 1999 - 2008 Intel Corporation.
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This program is free software; you can redistribute it and/or modify it
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under the terms and conditions of the GNU General Public License,
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@@ -29,6 +29,9 @@
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/*
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* 82571EB Gigabit Ethernet Controller
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* 82571EB Gigabit Ethernet Controller (Fiber)
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* 82571EB Dual Port Gigabit Mezzanine Adapter
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* 82571EB Quad Port Gigabit Mezzanine Adapter
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* 82571PT Gigabit PT Quad Port Server ExpressModule
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* 82572EI Gigabit Ethernet Controller (Copper)
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* 82572EI Gigabit Ethernet Controller (Fiber)
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* 82572EI Gigabit Ethernet Controller
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@@ -150,7 +153,8 @@ static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)
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if (((eecd >> 15) & 0x3) == 0x3) {
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nvm->type = e1000_nvm_flash_hw;
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nvm->word_size = 2048;
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/* Autonomous Flash update bit must be cleared due
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/*
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* Autonomous Flash update bit must be cleared due
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* to Flash update issue.
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*/
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eecd &= ~E1000_EECD_AUPDEN;
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@@ -159,10 +163,11 @@ static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw)
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}
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/* Fall Through */
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default:
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nvm->type = e1000_nvm_eeprom_spi;
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nvm->type = e1000_nvm_eeprom_spi;
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size = (u16)((eecd & E1000_EECD_SIZE_EX_MASK) >>
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E1000_EECD_SIZE_EX_SHIFT);
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/* Added to a constant, "size" becomes the left-shift value
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/*
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* Added to a constant, "size" becomes the left-shift value
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* for setting word_size.
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*/
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size += NVM_WORD_SIZE_BASE_SHIFT;
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@@ -208,8 +213,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter)
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/* Set rar entry count */
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mac->rar_entry_count = E1000_RAR_ENTRIES;
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/* Set if manageability features are enabled. */
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mac->arc_subsystem_valid =
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(er32(FWSM) & E1000_FWSM_MODE_MASK) ? 1 : 0;
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mac->arc_subsystem_valid = (er32(FWSM) & E1000_FWSM_MODE_MASK) ? 1 : 0;
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/* check for link */
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switch (hw->media_type) {
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@@ -219,14 +223,18 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter)
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func->get_link_up_info = e1000e_get_speed_and_duplex_copper;
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break;
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case e1000_media_type_fiber:
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func->setup_physical_interface = e1000_setup_fiber_serdes_link_82571;
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func->setup_physical_interface =
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e1000_setup_fiber_serdes_link_82571;
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func->check_for_link = e1000e_check_for_fiber_link;
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func->get_link_up_info = e1000e_get_speed_and_duplex_fiber_serdes;
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func->get_link_up_info =
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e1000e_get_speed_and_duplex_fiber_serdes;
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break;
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case e1000_media_type_internal_serdes:
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func->setup_physical_interface = e1000_setup_fiber_serdes_link_82571;
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func->setup_physical_interface =
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e1000_setup_fiber_serdes_link_82571;
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func->check_for_link = e1000e_check_for_serdes_link;
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func->get_link_up_info = e1000e_get_speed_and_duplex_fiber_serdes;
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func->get_link_up_info =
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e1000e_get_speed_and_duplex_fiber_serdes;
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break;
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default:
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return -E1000_ERR_CONFIG;
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@@ -322,10 +330,12 @@ static s32 e1000_get_phy_id_82571(struct e1000_hw *hw)
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switch (hw->mac.type) {
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case e1000_82571:
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case e1000_82572:
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/* The 82571 firmware may still be configuring the PHY.
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/*
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* The 82571 firmware may still be configuring the PHY.
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* In this case, we cannot access the PHY until the
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* configuration is done. So we explicitly set the
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* PHY ID. */
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* PHY ID.
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*/
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phy->id = IGP01E1000_I_PHY_ID;
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break;
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case e1000_82573:
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@@ -479,8 +489,10 @@ static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw)
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if (ret_val)
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return ret_val;
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/* If our nvm is an EEPROM, then we're done
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* otherwise, commit the checksum to the flash NVM. */
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/*
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* If our nvm is an EEPROM, then we're done
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* otherwise, commit the checksum to the flash NVM.
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*/
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if (hw->nvm.type != e1000_nvm_flash_hw)
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return ret_val;
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@@ -496,7 +508,8 @@ static s32 e1000_update_nvm_checksum_82571(struct e1000_hw *hw)
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/* Reset the firmware if using STM opcode. */
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if ((er32(FLOP) & 0xFF00) == E1000_STM_OPCODE) {
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/* The enabling of and the actual reset must be done
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/*
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* The enabling of and the actual reset must be done
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* in two write cycles.
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*/
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ew32(HICR, E1000_HICR_FW_RESET_ENABLE);
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@@ -557,8 +570,10 @@ static s32 e1000_write_nvm_eewr_82571(struct e1000_hw *hw, u16 offset,
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u32 eewr = 0;
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s32 ret_val = 0;
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/* A check for invalid values: offset too large, too many words,
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* and not enough words. */
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/*
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* A check for invalid values: offset too large, too many words,
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* and not enough words.
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*/
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if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) ||
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(words == 0)) {
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hw_dbg(hw, "nvm parameter(s) out of bounds\n");
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@@ -645,30 +660,32 @@ static s32 e1000_set_d0_lplu_state_82571(struct e1000_hw *hw, bool active)
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} else {
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data &= ~IGP02E1000_PM_D0_LPLU;
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ret_val = e1e_wphy(hw, IGP02E1000_PHY_POWER_MGMT, data);
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/* LPLU and SmartSpeed are mutually exclusive. LPLU is used
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/*
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* LPLU and SmartSpeed are mutually exclusive. LPLU is used
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* during Dx states where the power conservation is most
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* important. During driver activity we should enable
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* SmartSpeed, so performance is maintained. */
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* SmartSpeed, so performance is maintained.
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*/
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if (phy->smart_speed == e1000_smart_speed_on) {
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ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,
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&data);
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&data);
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if (ret_val)
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return ret_val;
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data |= IGP01E1000_PSCFR_SMART_SPEED;
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ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,
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data);
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data);
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if (ret_val)
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return ret_val;
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} else if (phy->smart_speed == e1000_smart_speed_off) {
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ret_val = e1e_rphy(hw, IGP01E1000_PHY_PORT_CONFIG,
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&data);
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&data);
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if (ret_val)
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return ret_val;
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data &= ~IGP01E1000_PSCFR_SMART_SPEED;
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ret_val = e1e_wphy(hw, IGP01E1000_PHY_PORT_CONFIG,
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data);
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data);
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if (ret_val)
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return ret_val;
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}
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@@ -693,7 +710,8 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
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s32 ret_val;
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u16 i = 0;
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/* Prevent the PCI-E bus from sticking if there is no TLP connection
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/*
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* Prevent the PCI-E bus from sticking if there is no TLP connection
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* on the last TLP read/write transaction when MAC is reset.
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*/
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ret_val = e1000e_disable_pcie_master(hw);
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@@ -709,8 +727,10 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
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msleep(10);
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/* Must acquire the MDIO ownership before MAC reset.
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* Ownership defaults to firmware after a reset. */
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/*
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* Must acquire the MDIO ownership before MAC reset.
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* Ownership defaults to firmware after a reset.
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*/
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if (hw->mac.type == e1000_82573) {
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extcnf_ctrl = er32(EXTCNF_CTRL);
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extcnf_ctrl |= E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP;
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@@ -747,7 +767,8 @@ static s32 e1000_reset_hw_82571(struct e1000_hw *hw)
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/* We don't want to continue accessing MAC registers. */
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return ret_val;
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/* Phy configuration from NVM just starts after EECD_AUTO_RD is set.
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/*
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* Phy configuration from NVM just starts after EECD_AUTO_RD is set.
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* Need to wait for Phy configuration completion before accessing
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* NVM and Phy.
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*/
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@@ -793,7 +814,8 @@ static s32 e1000_init_hw_82571(struct e1000_hw *hw)
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e1000e_clear_vfta(hw);
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/* Setup the receive address. */
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/* If, however, a locally administered address was assigned to the
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/*
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* If, however, a locally administered address was assigned to the
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* 82571, we must reserve a RAR for it to work around an issue where
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* resetting one port will reload the MAC on the other port.
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*/
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@@ -830,7 +852,8 @@ static s32 e1000_init_hw_82571(struct e1000_hw *hw)
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ew32(GCR, reg_data);
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}
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/* Clear all of the statistics registers (clear on read). It is
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/*
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* Clear all of the statistics registers (clear on read). It is
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* important that we do this after we have tried to establish link
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* because the symbol error count will increment wildly if there
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* is no link.
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@@ -922,7 +945,8 @@ void e1000e_clear_vfta(struct e1000_hw *hw)
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if (hw->mac.type == e1000_82573) {
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if (hw->mng_cookie.vlan_id != 0) {
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/* The VFTA is a 4096b bit-field, each identifying
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/*
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* The VFTA is a 4096b bit-field, each identifying
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* a single VLAN ID. The following operations
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* determine which 32b entry (i.e. offset) into the
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* array we want to set the VLAN ID (i.e. bit) of
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@@ -936,7 +960,8 @@ void e1000e_clear_vfta(struct e1000_hw *hw)
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}
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}
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for (offset = 0; offset < E1000_VLAN_FILTER_TBL_SIZE; offset++) {
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/* If the offset we want to clear is the same offset of the
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/*
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* If the offset we want to clear is the same offset of the
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* manageability VLAN ID, then clear all bits except that of
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* the manageability unit.
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*/
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@@ -984,7 +1009,8 @@ static void e1000_mc_addr_list_update_82571(struct e1000_hw *hw,
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**/
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static s32 e1000_setup_link_82571(struct e1000_hw *hw)
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{
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/* 82573 does not have a word in the NVM to determine
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/*
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* 82573 does not have a word in the NVM to determine
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* the default flow control setting, so we explicitly
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* set it to full.
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*/
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@@ -1050,14 +1076,14 @@ static s32 e1000_setup_fiber_serdes_link_82571(struct e1000_hw *hw)
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switch (hw->mac.type) {
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case e1000_82571:
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case e1000_82572:
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/* If SerDes loopback mode is entered, there is no form
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/*
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* If SerDes loopback mode is entered, there is no form
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* of reset to take the adapter out of that mode. So we
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* have to explicitly take the adapter out of loopback
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* mode. This prevents drivers from twiddling their thumbs
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* if another tool failed to take it out of loopback mode.
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*/
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ew32(SCTL,
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E1000_SCTL_DISABLE_SERDES_LOOPBACK);
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ew32(SCTL, E1000_SCTL_DISABLE_SERDES_LOOPBACK);
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break;
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default:
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break;
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@@ -1124,7 +1150,8 @@ void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state)
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/* If workaround is activated... */
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if (state)
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/* Hold a copy of the LAA in RAR[14] This is done so that
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/*
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* Hold a copy of the LAA in RAR[14] This is done so that
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* between the time RAR[0] gets clobbered and the time it
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* gets fixed, the actual LAA is in one of the RARs and no
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* incoming packets directed to this port are dropped.
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@@ -1152,7 +1179,8 @@ static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw)
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if (nvm->type != e1000_nvm_flash_hw)
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return 0;
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/* Check bit 4 of word 10h. If it is 0, firmware is done updating
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/*
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* Check bit 4 of word 10h. If it is 0, firmware is done updating
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* 10h-12h. Checksum may need to be fixed.
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*/
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ret_val = e1000_read_nvm(hw, 0x10, 1, &data);
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@@ -1160,7 +1188,8 @@ static s32 e1000_fix_nvm_checksum_82571(struct e1000_hw *hw)
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return ret_val;
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if (!(data & 0x10)) {
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/* Read 0x23 and check bit 15. This bit is a 1
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/*
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* Read 0x23 and check bit 15. This bit is a 1
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* when the checksum has already been fixed. If
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* the checksum is still wrong and this bit is a
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* 1, we need to return bad checksum. Otherwise,
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