Merge tag 'for-linus-20160112' of git://git.infradead.org/linux-mtd
Pull MTD updates from Brian Norris: "Generic MTD: - populate the MTD device 'of_node' field (and get a proper 'of_node' symlink in sysfs) This yielded some new helper functions, and changes across a variety of drivers - partitioning cleanups, to prepare for better device-tree based partitioning in the future Eliminate a lot of boilerplate for drivers that want to use OF-based partition parsing The DT bindings for this didn't settle yet, so most non-cleanup portions are deferred for a future release NAND: - embed a struct mtd_info inside struct nand_chip This is really long overdue; too many drivers have to do the same silly boilerplate to allocate and link up two "independent" structs, when in fact, everyone is assuming there is an exact 1:1 relationship between a NAND chips struct and its underlying MTD. This aids improved helpers and should make certain abstractions easier in the future. Also causes a lot of churn, helped along by some automated code transformations - add more core support for detecting (and "correcting") bitflips in erased pages; requires opt-in by drivers, but at least we kill a few bad implementations and hopefully stave off future ones - pxa3xx_nand: cleanups, a few fixes, and PM improvements - new JZ4780 NAND driver SPI NOR: - provide default erase function, for controllers that just want to send the SECTOR_ERASE command directly - fix some module auto-loading issues with device tree ("jedec,spi-nor") - error handling fixes - new Mediatek QSPI flash driver Other: - cfi: force valid geometry Kconfig (finally!) This one used to trip up randconfigs occasionally, since bots aren't deterred by big scary "advanced configuration" menus More? Probably. See the commit logs" * tag 'for-linus-20160112' of git://git.infradead.org/linux-mtd: (168 commits) mtd: jz4780_nand: replace if/else blocks with switch/case mtd: nand: jz4780: Update ecc correction error codes mtd: nandsim: use nand_get_controller_data() mtd: jz4780_nand: remove useless mtd->priv = chip assignment staging: mt29f_spinand: make use of nand_set/get_controller_data() helpers mtd: nand: make use of nand_set/get_controller_data() helpers ARM: make use of nand_set/get_controller_data() helpers mtd: nand: add helpers to access ->priv mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs mtd: nand: jz4740: remove custom 'erased check' implementation mtd: nand: diskonchip: remove custom 'erased check' implementation mtd: nand: davinci: remove custom 'erased check' implementation mtd: nand: use nand_check_erased_ecc_chunk in default ECC read functions mtd: nand: return consistent error codes in ecc.correct() implementations doc: dt: mtd: new binding for jz4780-{nand,bch} mtd: cfi_cmdset_0001: fixing memory leak and handling failed kmalloc mtd: spi-nor: wait until lock/unlock operations are ready mtd: tests: consolidate kmalloc/memset 0 call to kzalloc jffs2: use to_delayed_work mtd: nand: assign reasonable default name for NAND drivers ...
This commit is contained in:
@@ -579,6 +579,8 @@ struct bcma_pflash {
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};
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#ifdef CONFIG_BCMA_SFLASH
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struct mtd_info;
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struct bcma_sflash {
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bool present;
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u32 window;
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@@ -592,13 +594,9 @@ struct bcma_sflash {
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#endif
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#ifdef CONFIG_BCMA_NFLASH
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struct mtd_info;
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struct bcma_nflash {
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bool present;
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bool boot; /* This is the flash the SoC boots from */
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struct mtd_info *mtd;
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};
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#endif
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@@ -142,7 +142,9 @@
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#endif
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#ifndef map_bankwidth
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#ifdef CONFIG_MTD
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#warning "No CONFIG_MTD_MAP_BANK_WIDTH_xx selected. No NOR chip support can work"
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#endif
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static inline int map_bankwidth(void *map)
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{
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BUG();
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@@ -254,6 +254,17 @@ struct mtd_info {
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int usecount;
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};
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static inline void mtd_set_of_node(struct mtd_info *mtd,
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struct device_node *np)
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{
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mtd->dev.of_node = np;
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}
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static inline struct device_node *mtd_get_of_node(struct mtd_info *mtd)
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{
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return mtd->dev.of_node;
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}
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int mtd_erase(struct mtd_info *mtd, struct erase_info *instr);
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int mtd_point(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen,
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void **virt, resource_size_t *phys);
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@@ -129,6 +129,14 @@ typedef enum {
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/* Enable Hardware ECC before syndrome is read back from flash */
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#define NAND_ECC_READSYN 2
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/*
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* Enable generic NAND 'page erased' check. This check is only done when
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* ecc.correct() returns -EBADMSG.
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* Set this flag if your implementation does not fix bitflips in erased
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* pages and you want to rely on the default implementation.
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*/
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#define NAND_ECC_GENERIC_ERASED_CHECK BIT(0)
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/* Bit mask for flags passed to do_nand_read_ecc */
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#define NAND_GET_DEVICE 0x80
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@@ -276,15 +284,15 @@ struct nand_onfi_params {
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__le16 t_r;
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__le16 t_ccs;
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__le16 src_sync_timing_mode;
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__le16 src_ssync_features;
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u8 src_ssync_features;
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__le16 clk_pin_capacitance_typ;
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__le16 io_pin_capacitance_typ;
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__le16 input_pin_capacitance_typ;
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u8 input_pin_capacitance_max;
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u8 driver_strength_support;
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__le16 t_int_r;
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__le16 t_ald;
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u8 reserved4[7];
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__le16 t_adl;
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u8 reserved4[8];
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/* vendor */
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__le16 vendor_revision;
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@@ -407,7 +415,7 @@ struct nand_jedec_params {
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__le16 input_pin_capacitance_typ;
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__le16 clk_pin_capacitance_typ;
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u8 driver_strength_support;
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__le16 t_ald;
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__le16 t_adl;
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u8 reserved4[36];
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/* ECC and endurance block */
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@@ -451,12 +459,19 @@ struct nand_hw_control {
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* @total: total number of ECC bytes per page
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* @prepad: padding information for syndrome based ECC generators
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* @postpad: padding information for syndrome based ECC generators
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* @options: ECC specific options (see NAND_ECC_XXX flags defined above)
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* @layout: ECC layout control struct pointer
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* @priv: pointer to private ECC control data
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* @hwctl: function to control hardware ECC generator. Must only
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* be provided if an hardware ECC is available
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* @calculate: function for ECC calculation or readback from ECC hardware
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* @correct: function for ECC correction, matching to ECC generator (sw/hw)
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* @correct: function for ECC correction, matching to ECC generator (sw/hw).
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* Should return a positive number representing the number of
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* corrected bitflips, -EBADMSG if the number of bitflips exceed
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* ECC strength, or any other error code if the error is not
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* directly related to correction.
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* If -EBADMSG is returned the input buffers should be left
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* untouched.
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* @read_page_raw: function to read a raw page without ECC. This function
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* should hide the specific layout used by the ECC
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* controller and always return contiguous in-band and
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@@ -494,6 +509,7 @@ struct nand_ecc_ctrl {
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int strength;
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int prepad;
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int postpad;
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unsigned int options;
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struct nand_ecclayout *layout;
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void *priv;
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void (*hwctl)(struct mtd_info *mtd, int mode);
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@@ -540,11 +556,11 @@ struct nand_buffers {
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/**
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* struct nand_chip - NAND Private Flash Chip Data
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* @mtd: MTD device registered to the MTD framework
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* @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the
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* flash device
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* @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the
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* flash device.
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* @flash_node: [BOARDSPECIFIC] device node describing this instance
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* @read_byte: [REPLACEABLE] read one byte from the chip
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* @read_word: [REPLACEABLE] read one word from the chip
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* @write_byte: [REPLACEABLE] write a single byte to the chip on the
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@@ -640,11 +656,10 @@ struct nand_buffers {
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*/
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struct nand_chip {
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struct mtd_info mtd;
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void __iomem *IO_ADDR_R;
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void __iomem *IO_ADDR_W;
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struct device_node *flash_node;
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uint8_t (*read_byte)(struct mtd_info *mtd);
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u16 (*read_word)(struct mtd_info *mtd);
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void (*write_byte)(struct mtd_info *mtd, uint8_t byte);
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@@ -719,6 +734,37 @@ struct nand_chip {
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void *priv;
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};
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static inline void nand_set_flash_node(struct nand_chip *chip,
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struct device_node *np)
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{
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mtd_set_of_node(&chip->mtd, np);
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}
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static inline struct device_node *nand_get_flash_node(struct nand_chip *chip)
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{
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return mtd_get_of_node(&chip->mtd);
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}
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static inline struct nand_chip *mtd_to_nand(struct mtd_info *mtd)
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{
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return container_of(mtd, struct nand_chip, mtd);
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}
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static inline struct mtd_info *nand_to_mtd(struct nand_chip *chip)
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{
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return &chip->mtd;
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}
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static inline void *nand_get_controller_data(struct nand_chip *chip)
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{
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return chip->priv;
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}
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static inline void nand_set_controller_data(struct nand_chip *chip, void *priv)
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{
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chip->priv = priv;
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}
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/*
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* NAND Flash Manufacturer ID Codes
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*/
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@@ -907,15 +953,6 @@ struct platform_nand_data {
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struct platform_nand_ctrl ctrl;
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};
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/* Some helpers to access the data structures */
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static inline
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struct platform_nand_chip *get_platform_nandchip(struct mtd_info *mtd)
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{
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struct nand_chip *chip = mtd->priv;
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return chip->priv;
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}
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/* return the supported features. */
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static inline int onfi_feature(struct nand_chip *chip)
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{
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@@ -55,7 +55,7 @@ static inline int
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nand_bch_correct_data(struct mtd_info *mtd, unsigned char *buf,
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unsigned char *read_ecc, unsigned char *calc_ecc)
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{
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return -1;
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return -ENOTSUPP;
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}
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static inline struct nand_bch_control *
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@@ -41,7 +41,6 @@ struct mtd_partition {
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uint64_t size; /* partition size */
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uint64_t offset; /* offset within the master MTD space */
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uint32_t mask_flags; /* master MTD flags to mask out for this partition */
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struct nand_ecclayout *ecclayout; /* out of band layout for this partition (NAND only) */
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};
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#define MTDPART_OFS_RETAIN (-3)
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@@ -56,11 +55,9 @@ struct device_node;
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/**
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* struct mtd_part_parser_data - used to pass data to MTD partition parsers.
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* @origin: for RedBoot, start address of MTD device
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* @of_node: for OF parsers, device node containing partitioning information
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*/
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struct mtd_part_parser_data {
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unsigned long origin;
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struct device_node *of_node;
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};
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@@ -72,13 +69,33 @@ struct mtd_part_parser {
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struct list_head list;
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struct module *owner;
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const char *name;
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int (*parse_fn)(struct mtd_info *, struct mtd_partition **,
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int (*parse_fn)(struct mtd_info *, const struct mtd_partition **,
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struct mtd_part_parser_data *);
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void (*cleanup)(const struct mtd_partition *pparts, int nr_parts);
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};
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extern void register_mtd_parser(struct mtd_part_parser *parser);
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/* Container for passing around a set of parsed partitions */
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struct mtd_partitions {
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const struct mtd_partition *parts;
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int nr_parts;
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const struct mtd_part_parser *parser;
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};
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extern int __register_mtd_parser(struct mtd_part_parser *parser,
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struct module *owner);
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#define register_mtd_parser(parser) __register_mtd_parser(parser, THIS_MODULE)
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extern void deregister_mtd_parser(struct mtd_part_parser *parser);
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/*
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* module_mtd_part_parser() - Helper macro for MTD partition parsers that don't
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* do anything special in module init/exit. Each driver may only use this macro
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* once, and calling it replaces module_init() and module_exit().
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*/
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#define module_mtd_part_parser(__mtd_part_parser) \
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module_driver(__mtd_part_parser, register_mtd_parser, \
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deregister_mtd_parser)
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int mtd_is_partition(const struct mtd_info *mtd);
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int mtd_add_partition(struct mtd_info *master, const char *name,
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long long offset, long long length);
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@@ -143,11 +143,11 @@ enum flctl_ecc_res_t {
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struct dma_chan;
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struct sh_flctl {
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struct mtd_info mtd;
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struct nand_chip chip;
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struct platform_device *pdev;
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struct dev_pm_qos_request pm_qos;
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void __iomem *reg;
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resource_size_t fifo;
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uint8_t done_buff[2048 + 64]; /* max size 2048 + 64 */
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int read_bytes;
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@@ -186,7 +186,7 @@ struct sh_flctl_platform_data {
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static inline struct sh_flctl *mtd_to_flctl(struct mtd_info *mtdinfo)
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{
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return container_of(mtdinfo, struct sh_flctl, mtd);
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return container_of(mtd_to_nand(mtdinfo), struct sh_flctl, chip);
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}
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#endif /* __SH_FLCTL_H__ */
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@@ -12,6 +12,7 @@
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#include <linux/bitops.h>
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#include <linux/mtd/cfi.h>
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#include <linux/mtd/mtd.h>
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/*
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* Manufacturer IDs
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@@ -117,14 +118,11 @@ enum spi_nor_option_flags {
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SNOR_F_USE_FSR = BIT(0),
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};
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struct mtd_info;
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/**
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* struct spi_nor - Structure for defining a the SPI NOR layer
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* @mtd: point to a mtd_info structure
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* @lock: the lock for the read/write/erase/lock/unlock operations
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* @dev: point to a spi device, or a spi nor controller device.
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* @flash_node: point to a device node describing this flash instance.
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* @page_size: the page size of the SPI NOR
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* @addr_width: number of address bytes
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* @erase_opcode: the opcode for erasing a sector
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@@ -144,7 +142,8 @@ struct mtd_info;
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* @read: [DRIVER-SPECIFIC] read data from the SPI NOR
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* @write: [DRIVER-SPECIFIC] write data to the SPI NOR
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* @erase: [DRIVER-SPECIFIC] erase a sector of the SPI NOR
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* at the offset @offs
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* at the offset @offs; if not provided by the driver,
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* spi-nor will send the erase opcode via write_reg()
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* @flash_lock: [FLASH-SPECIFIC] lock a region of the SPI NOR
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* @flash_unlock: [FLASH-SPECIFIC] unlock a region of the SPI NOR
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* @flash_is_locked: [FLASH-SPECIFIC] check if a region of the SPI NOR is
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@@ -155,7 +154,6 @@ struct spi_nor {
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struct mtd_info mtd;
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struct mutex lock;
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struct device *dev;
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struct device_node *flash_node;
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u32 page_size;
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u8 addr_width;
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u8 erase_opcode;
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@@ -185,6 +183,17 @@ struct spi_nor {
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void *priv;
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};
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static inline void spi_nor_set_flash_node(struct spi_nor *nor,
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struct device_node *np)
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{
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mtd_set_of_node(&nor->mtd, np);
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}
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static inline struct device_node *spi_nor_get_flash_node(struct spi_nor *nor)
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{
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return mtd_get_of_node(&nor->mtd);
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}
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/**
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* spi_nor_scan() - scan the SPI NOR
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* @nor: the spi_nor structure
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