EDAC, altera: Add Arria10 Ethernet EDAC support
Add Altera Arria10 Ethernet FIFO memory EDAC support. Update to support a common compatibility string for all Ethernet FIFOs in the DT. Signed-off-by: Thor Thayer <tthayer@opensource.altera.com> Cc: linux-arm-kernel@lists.infradead.org Cc: linux-edac <linux-edac@vger.kernel.org> Link: http://lkml.kernel.org/r/1466603939-7526-8-git-send-email-tthayer@opensource.altera.com Signed-off-by: Borislav Petkov <bp@suse.de>
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Borislav Petkov

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@@ -285,6 +285,9 @@ struct altr_sdram_mc_data {
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/* Arria 10 OCRAM ECC Management Group Defines */
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#define ALTR_A10_OCRAM_ECC_EN_CTL (BIT(1) | BIT(0))
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/* Arria 10 Ethernet ECC Management Group Defines */
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#define ALTR_A10_COMMON_ECC_EN_CTL BIT(0)
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/* A10 ECC Controller memory initialization timeout */
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#define ALTR_A10_ECC_INIT_WATCHDOG_10US 10000
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