drm/tegra: Implement zpos property
Implement the standard zpos property for planes on Tegra124 and later. Earlier generations have a different blending unit that needs different programming. Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
@@ -152,6 +152,55 @@ static inline u32 compute_initial_dda(unsigned int in)
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return dfixed_frac(inf);
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}
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static void tegra_plane_setup_blending_legacy(struct tegra_plane *plane)
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{
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/*
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* Disable blending and assume Window A is the bottom-most window,
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* Window C is the top-most window and Window B is in the middle.
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*/
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tegra_plane_writel(plane, 0xffff00, DC_WIN_BLEND_NOKEY);
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tegra_plane_writel(plane, 0xffff00, DC_WIN_BLEND_1WIN);
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switch (plane->index) {
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case 0:
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tegra_plane_writel(plane, 0x000000, DC_WIN_BLEND_2WIN_X);
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tegra_plane_writel(plane, 0x000000, DC_WIN_BLEND_2WIN_Y);
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tegra_plane_writel(plane, 0x000000, DC_WIN_BLEND_3WIN_XY);
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break;
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case 1:
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tegra_plane_writel(plane, 0xffff00, DC_WIN_BLEND_2WIN_X);
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tegra_plane_writel(plane, 0x000000, DC_WIN_BLEND_2WIN_Y);
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tegra_plane_writel(plane, 0x000000, DC_WIN_BLEND_3WIN_XY);
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break;
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case 2:
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tegra_plane_writel(plane, 0xffff00, DC_WIN_BLEND_2WIN_X);
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tegra_plane_writel(plane, 0xffff00, DC_WIN_BLEND_2WIN_Y);
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tegra_plane_writel(plane, 0xffff00, DC_WIN_BLEND_3WIN_XY);
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break;
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}
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}
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static void tegra_plane_setup_blending(struct tegra_plane *plane,
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const struct tegra_dc_window *window)
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{
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u32 value;
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value = BLEND_FACTOR_DST_ALPHA_ZERO | BLEND_FACTOR_SRC_ALPHA_K2 |
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BLEND_FACTOR_DST_COLOR_NEG_K1_TIMES_SRC |
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BLEND_FACTOR_SRC_COLOR_K1_TIMES_SRC;
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tegra_plane_writel(plane, value, DC_WIN_BLEND_MATCH_SELECT);
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value = BLEND_FACTOR_DST_ALPHA_ZERO | BLEND_FACTOR_SRC_ALPHA_K2 |
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BLEND_FACTOR_DST_COLOR_NEG_K1_TIMES_SRC |
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BLEND_FACTOR_SRC_COLOR_K1_TIMES_SRC;
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tegra_plane_writel(plane, value, DC_WIN_BLEND_NOMATCH_SELECT);
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value = K2(255) | K1(255) | WINDOW_LAYER_DEPTH(255 - window->zpos);
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tegra_plane_writel(plane, value, DC_WIN_BLEND_LAYER_CONTROL);
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}
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static void tegra_dc_setup_window(struct tegra_plane *plane,
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const struct tegra_dc_window *window)
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{
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@@ -291,32 +340,10 @@ static void tegra_dc_setup_window(struct tegra_plane *plane,
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tegra_plane_writel(plane, value, DC_WIN_WIN_OPTIONS);
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/*
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* Disable blending and assume Window A is the bottom-most window,
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* Window C is the top-most window and Window B is in the middle.
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*/
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tegra_plane_writel(plane, 0xffff00, DC_WIN_BLEND_NOKEY);
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tegra_plane_writel(plane, 0xffff00, DC_WIN_BLEND_1WIN);
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switch (plane->index) {
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case 0:
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tegra_plane_writel(plane, 0x000000, DC_WIN_BLEND_2WIN_X);
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tegra_plane_writel(plane, 0x000000, DC_WIN_BLEND_2WIN_Y);
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tegra_plane_writel(plane, 0x000000, DC_WIN_BLEND_3WIN_XY);
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break;
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case 1:
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tegra_plane_writel(plane, 0xffff00, DC_WIN_BLEND_2WIN_X);
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tegra_plane_writel(plane, 0x000000, DC_WIN_BLEND_2WIN_Y);
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tegra_plane_writel(plane, 0x000000, DC_WIN_BLEND_3WIN_XY);
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break;
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case 2:
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tegra_plane_writel(plane, 0xffff00, DC_WIN_BLEND_2WIN_X);
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tegra_plane_writel(plane, 0xffff00, DC_WIN_BLEND_2WIN_Y);
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tegra_plane_writel(plane, 0xffff00, DC_WIN_BLEND_3WIN_XY);
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break;
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}
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if (dc->soc->supports_blending)
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tegra_plane_setup_blending(plane, window);
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else
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tegra_plane_setup_blending_legacy(plane);
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}
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static const u32 tegra20_primary_formats[] = {
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@@ -467,6 +494,7 @@ static void tegra_plane_atomic_update(struct drm_plane *plane,
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window.bottom_up = tegra_fb_is_bottom_up(fb);
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/* copy from state */
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window.zpos = plane->state->normalized_zpos;
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window.tiling = state->tiling;
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window.format = state->format;
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window.swap = state->swap;
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@@ -523,7 +551,6 @@ static struct drm_plane *tegra_primary_plane_create(struct drm_device *drm,
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/* Always use window A as primary window */
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plane->offset = 0xa00;
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plane->index = 0;
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plane->depth = 255;
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plane->dc = dc;
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num_formats = dc->soc->num_primary_formats;
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@@ -539,6 +566,9 @@ static struct drm_plane *tegra_primary_plane_create(struct drm_device *drm,
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drm_plane_helper_add(&plane->base, &tegra_plane_helper_funcs);
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if (dc->soc->supports_blending)
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drm_plane_create_zpos_property(&plane->base, 0, 0, 255);
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return &plane->base;
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}
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@@ -786,7 +816,6 @@ static struct drm_plane *tegra_dc_overlay_plane_create(struct drm_device *drm,
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plane->offset = 0xa00 + 0x200 * index;
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plane->index = index;
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plane->depth = 0;
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plane->dc = dc;
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num_formats = dc->soc->num_overlay_formats;
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@@ -803,6 +832,9 @@ static struct drm_plane *tegra_dc_overlay_plane_create(struct drm_device *drm,
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drm_plane_helper_add(&plane->base, &tegra_plane_helper_funcs);
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if (dc->soc->supports_blending)
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drm_plane_create_zpos_property(&plane->base, 0, 0, 255);
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return &plane->base;
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}
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@@ -1834,6 +1866,7 @@ static const struct tegra_dc_soc_info tegra20_dc_soc_info = {
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.supports_interlacing = false,
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.supports_cursor = false,
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.supports_block_linear = false,
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.supports_blending = false,
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.pitch_align = 8,
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.has_powergate = false,
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.broken_reset = true,
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@@ -1849,6 +1882,7 @@ static const struct tegra_dc_soc_info tegra30_dc_soc_info = {
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.supports_interlacing = false,
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.supports_cursor = false,
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.supports_block_linear = false,
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.supports_blending = false,
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.pitch_align = 8,
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.has_powergate = false,
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.broken_reset = false,
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@@ -1864,6 +1898,7 @@ static const struct tegra_dc_soc_info tegra114_dc_soc_info = {
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.supports_interlacing = false,
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.supports_cursor = false,
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.supports_block_linear = false,
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.supports_blending = false,
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.pitch_align = 64,
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.has_powergate = true,
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.broken_reset = false,
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@@ -1879,6 +1914,7 @@ static const struct tegra_dc_soc_info tegra124_dc_soc_info = {
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.supports_interlacing = true,
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.supports_cursor = true,
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.supports_block_linear = true,
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.supports_blending = true,
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.pitch_align = 64,
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.has_powergate = true,
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.broken_reset = false,
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@@ -1894,6 +1930,7 @@ static const struct tegra_dc_soc_info tegra210_dc_soc_info = {
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.supports_interlacing = true,
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.supports_cursor = true,
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.supports_block_linear = true,
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.supports_blending = true,
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.pitch_align = 64,
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.has_powergate = true,
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.broken_reset = false,
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@@ -1943,6 +1980,7 @@ static const struct tegra_dc_soc_info tegra186_dc_soc_info = {
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.supports_interlacing = true,
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.supports_cursor = true,
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.supports_block_linear = true,
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.supports_blending = true,
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.pitch_align = 64,
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.has_powergate = false,
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.broken_reset = false,
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