drm/radeon/kms: add dpm support for SI (v7)
This adds dpm support for SI asics. This includes: - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2/gen3 switching - power containment - shader power scaling Set radeon.dpm=1 to enable. v2: enable hainan support, rebase v3: guard acpi stuff v4: fix 64 bit math v5: fix 64 bit div harder v6: fix thermal interrupt check noticed by Jerome v7: attempt fix state enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
@@ -111,4 +111,19 @@
|
||||
#define CAYMAN_SMC_INT_VECTOR_START 0xffc0
|
||||
#define CAYMAN_SMC_INT_VECTOR_SIZE 0x0040
|
||||
|
||||
#define TAHITI_SMC_UCODE_START 0x10000
|
||||
#define TAHITI_SMC_UCODE_SIZE 0xf458
|
||||
|
||||
#define PITCAIRN_SMC_UCODE_START 0x10000
|
||||
#define PITCAIRN_SMC_UCODE_SIZE 0xe9f4
|
||||
|
||||
#define VERDE_SMC_UCODE_START 0x10000
|
||||
#define VERDE_SMC_UCODE_SIZE 0xebe4
|
||||
|
||||
#define OLAND_SMC_UCODE_START 0x10000
|
||||
#define OLAND_SMC_UCODE_SIZE 0xe7b4
|
||||
|
||||
#define HAINAN_SMC_UCODE_START 0x10000
|
||||
#define HAINAN_SMC_UCODE_SIZE 0xe67C
|
||||
|
||||
#endif
|
||||
|
Reference in New Issue
Block a user