drm/radeon/kms: add dpm support for SI (v7)
This adds dpm support for SI asics. This includes: - dynamic engine clock scaling - dynamic memory clock scaling - dynamic voltage scaling - dynamic pcie gen1/gen2/gen3 switching - power containment - shader power scaling Set radeon.dpm=1 to enable. v2: enable hainan support, rebase v3: guard acpi stuff v4: fix 64 bit math v5: fix 64 bit div harder v6: fix thermal interrupt check noticed by Jerome v7: attempt fix state enable Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
@@ -231,4 +231,11 @@ struct ni_power_info {
|
||||
#define NISLANDS_DPM2_SQ_RAMP_STI_SIZE 0x1E
|
||||
#define NISLANDS_DPM2_SQ_RAMP_LTI_RATIO 0xF
|
||||
|
||||
int ni_copy_and_switch_arb_sets(struct radeon_device *rdev,
|
||||
u32 arb_freq_src, u32 arb_freq_dest);
|
||||
void ni_update_current_ps(struct radeon_device *rdev,
|
||||
struct radeon_ps *rps);
|
||||
void ni_update_requested_ps(struct radeon_device *rdev,
|
||||
struct radeon_ps *rps);
|
||||
|
||||
#endif
|
||||
|
Reference in New Issue
Block a user