Merge tag 'sti-soc-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into next/soc
Merge "STi SoC changes for v4.8" from Patrice Chotard: - Add a dummy L2 cache's write_sec callback as in non secure mode execution, we can't get access to L2 cache secure registers - Cosmetics change, in case of dump_stack, update the hardware name with a more generic for the STi SoCs family * tag 'sti-soc-for-v4.8' of git://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti: ARM: sti: Implement dummy L2 cache's write_sec ARM: STi: Update machine _namestr to be more generic.
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@@ -23,7 +23,15 @@ static const char *const stih41x_dt_match[] __initconst = {
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NULL
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};
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DT_MACHINE_START(STM, "STiH415/416 SoC with Flattened Device Tree")
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static void sti_l2_write_sec(unsigned long val, unsigned reg)
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{
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/*
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* We can't write to secure registers as we are in non-secure
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* mode, until we have some SMI service available.
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*/
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}
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DT_MACHINE_START(STM, "STi SoC with Flattened Device Tree")
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.dt_compat = stih41x_dt_match,
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.l2c_aux_val = L2C_AUX_CTRL_SHARED_OVERRIDE |
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L310_AUX_CTRL_DATA_PREFETCH |
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@@ -31,4 +39,5 @@ DT_MACHINE_START(STM, "STiH415/416 SoC with Flattened Device Tree")
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L2C_AUX_CTRL_WAY_SIZE(4),
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.l2c_aux_mask = 0xc0000fff,
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.smp = smp_ops(sti_smp_ops),
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.l2c_write_sec = sti_l2_write_sec,
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MACHINE_END
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