KVM: x86: use hardware-compatible format for APIC ID register
We currently always shift APIC ID as if APIC was in xAPIC mode. x2APIC mode wants to use more bits and storing a hardware-compabible value is the the sanest option. KVM API to set the lapic expects that bottom 8 bits of APIC ID are in top 8 bits of APIC_ID register, so the register needs to be shifted in x2APIC mode. Signed-off-by: Radim Krčmář <rkrcmar@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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committed by
Paolo Bonzini

parent
3159d36ad7
commit
a92e2543d6
@@ -81,8 +81,8 @@ bool kvm_irq_delivery_to_apic_fast(struct kvm *kvm, struct kvm_lapic *src,
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u64 kvm_get_apic_base(struct kvm_vcpu *vcpu);
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int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info);
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void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu,
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struct kvm_lapic_state *s);
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int kvm_apic_get_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);
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int kvm_apic_set_state(struct kvm_vcpu *vcpu, struct kvm_lapic_state *s);
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int kvm_lapic_find_highest_irr(struct kvm_vcpu *vcpu);
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u64 kvm_get_lapic_tscdeadline_msr(struct kvm_vcpu *vcpu);
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@@ -202,7 +202,13 @@ static inline int kvm_lapic_latched_init(struct kvm_vcpu *vcpu)
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static inline u32 kvm_apic_id(struct kvm_lapic *apic)
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{
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return (kvm_lapic_get_reg(apic, APIC_ID) >> 24) & 0xff;
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/* To avoid a race between apic_base and following APIC_ID update when
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* switching to x2apic_mode, the x2apic mode returns initial x2apic id.
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*/
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if (apic_x2apic_mode(apic))
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return apic->vcpu->vcpu_id;
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return kvm_lapic_get_reg(apic, APIC_ID) >> 24;
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}
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bool kvm_apic_pending_eoi(struct kvm_vcpu *vcpu, int vector);
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