OMAPDSS: Add some new fields to omap_video_timings
Some panel timing related fields are contained in omap_panel_config in the form of flags. The fields are: - Hsync logic level - Vsync logic level - Data driven on rising/falling edge of pixel clock - Output enable/Data enable logic level - HSYNC/VSYNC driven on rising/falling edge of pixel clock Out of these parameters, Hsync and Vsync logic levels are a part of the timings in the Xorg modeline configuration. So it makes sense to move the to omap_video_timings. The rest aren't a part of modeline, but it still makes sense to move these since they are related to panel timings. These fields stored in omap_panel_config in dssdev are configured for LCD panels, and the corresponding LCD managers in the DISPC_POL_FREQo registers. Add the above fields in omap_video_timings. Represent their state via new enums. Add these parameters to the omap_video_timings instances in the panel drivers. Keep the corresponding IVS, IHS, IPC, IEO, RF and ONOFF flags in omap_panel_config for now. The struct will be removed later. Signed-off-by: Archit Taneja <archit@ti.com>
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committed by
Tomi Valkeinen

parent
a9105cb5c2
commit
a8d5e41cef
@@ -130,6 +130,17 @@ enum omap_panel_config {
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OMAP_DSS_LCD_ONOFF = 1<<5,
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};
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enum omap_dss_signal_level {
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OMAPDSS_SIG_ACTIVE_HIGH = 0,
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OMAPDSS_SIG_ACTIVE_LOW = 1,
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};
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enum omap_dss_signal_edge {
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OMAPDSS_DRIVE_SIG_OPPOSITE_EDGES,
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OMAPDSS_DRIVE_SIG_RISING_EDGE,
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OMAPDSS_DRIVE_SIG_FALLING_EDGE,
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};
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enum omap_dss_venc_type {
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OMAP_DSS_VENC_TYPE_COMPOSITE,
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OMAP_DSS_VENC_TYPE_SVIDEO,
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@@ -337,6 +348,17 @@ struct omap_video_timings {
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u16 vfp; /* Vertical front porch */
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/* Unit: line clocks */
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u16 vbp; /* Vertical back porch */
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/* Vsync logic level */
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enum omap_dss_signal_level vsync_level;
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/* Hsync logic level */
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enum omap_dss_signal_level hsync_level;
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/* Pixel clock edge to drive LCD data */
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enum omap_dss_signal_edge data_pclk_edge;
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/* Data enable logic level */
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enum omap_dss_signal_level de_level;
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/* Pixel clock edges to drive HSYNC and VSYNC signals */
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enum omap_dss_signal_edge sync_pclk_edge;
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};
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#ifdef CONFIG_OMAP2_DSS_VENC
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