iwlwifi: allow different csr flags for different device families
Different device families may have different flag values for passing a message to the fw (i.e. SW_RESET). In order to keep the code readable, and avoid conditioning upon the family, store a value for each flag, which indicates the bit that needs to be enabled. Signed-off-by: Golan Ben Ami <golan.ben.ami@intel.com> Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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@@ -8,6 +8,7 @@
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* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
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* Copyright(c) 2016 Intel Deutschland GmbH
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* Copyright(c) 2018 Intel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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@@ -34,6 +35,7 @@
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*
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* Copyright(c) 2005 - 2014 Intel Corporation. All rights reserved.
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* Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
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* Copyright(c) 2018 Intel Corporation
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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@@ -257,7 +259,6 @@
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/* RESET */
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#define CSR_RESET_REG_FLAG_NEVO_RESET (0x00000001)
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#define CSR_RESET_REG_FLAG_FORCE_NMI (0x00000002)
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#define CSR_RESET_REG_FLAG_SW_RESET (0x00000080)
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#define CSR_RESET_REG_FLAG_MASTER_DISABLED (0x00000100)
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#define CSR_RESET_REG_FLAG_STOP_MASTER (0x00000200)
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#define CSR_RESET_LINK_PWR_MGMT_DISABLED (0x80000000)
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@@ -280,35 +281,10 @@
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* 4: GOING_TO_SLEEP
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* Indicates MAC is entering a power-saving sleep power-down.
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* Not a good time to access device-internal resources.
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* 3: MAC_ACCESS_REQ
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* Host sets this to request and maintain MAC wakeup, to allow host
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* access to device-internal resources. Host must wait for
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* MAC_CLOCK_READY (and !GOING_TO_SLEEP) before accessing non-CSR
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* device registers.
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* 2: INIT_DONE
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* Host sets this to put device into fully operational D0 power mode.
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* Host resets this after SW_RESET to put device into low power mode.
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* 0: MAC_CLOCK_READY
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* Indicates MAC (ucode processor, etc.) is powered up and can run.
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* Internal resources are accessible.
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* NOTE: This does not indicate that the processor is actually running.
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* NOTE: This does not indicate that device has completed
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* init or post-power-down restore of internal SRAM memory.
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* Use CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP as indication that
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* SRAM is restored and uCode is in normal operation mode.
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* Later devices (5xxx/6xxx/1xxx) use non-volatile SRAM, and
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* do not need to save/restore it.
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* NOTE: After device reset, this bit remains "0" until host sets
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* INIT_DONE
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*/
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#define CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY (0x00000001)
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#define CSR_GP_CNTRL_REG_FLAG_INIT_DONE (0x00000004)
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#define CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ (0x00000008)
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#define CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP (0x00000010)
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#define CSR_GP_CNTRL_REG_FLAG_XTAL_ON (0x00000400)
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#define CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN (0x00000001)
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#define CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE (0x07000000)
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#define CSR_GP_CNTRL_REG_FLAG_RFKILL_WAKE_L1A_EN (0x04000000)
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#define CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW (0x08000000)
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