i40iw: Refactor of driver generated AEs
The flush CQP OP can be used to optionally generate Asynchronous Events (AEs) in addition to QP flush. Consolidate all HW AE generation code under a new function i40iw_gen_ae which use the flush CQP OP to only generate AEs. Signed-off-by: Henry Orosco <henry.orosco@intel.com> Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
This commit is contained in:

committed by
Jason Gunthorpe

vanhempi
7f86260b5f
commit
a8b9234b12
@@ -2614,10 +2614,8 @@ static enum i40iw_status_code i40iw_sc_qp_flush_wqes(
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qp->flush_sq |= flush_sq;
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qp->flush_rq |= flush_rq;
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if (!flush_sq && !flush_rq) {
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if (info->ae_code != I40IW_AE_LLP_RECEIVED_MPA_CRC_ERROR)
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return 0;
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}
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if (!flush_sq && !flush_rq)
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return 0;
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cqp = qp->pd->dev->cqp;
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wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
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@@ -2658,6 +2656,49 @@ static enum i40iw_status_code i40iw_sc_qp_flush_wqes(
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return 0;
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}
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/**
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* i40iw_sc_gen_ae - generate AE, currently uses flush WQE CQP OP
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* @qp: sc qp
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* @info: gen ae information
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* @scratch: u64 saved to be used during cqp completion
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* @post_sq: flag for cqp db to ring
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*/
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static enum i40iw_status_code i40iw_sc_gen_ae(
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struct i40iw_sc_qp *qp,
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struct i40iw_gen_ae_info *info,
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u64 scratch,
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bool post_sq)
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{
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u64 temp;
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u64 *wqe;
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struct i40iw_sc_cqp *cqp;
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u64 header;
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cqp = qp->pd->dev->cqp;
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wqe = i40iw_sc_cqp_get_next_send_wqe(cqp, scratch);
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if (!wqe)
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return I40IW_ERR_RING_FULL;
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temp = info->ae_code |
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LS_64(info->ae_source, I40IW_CQPSQ_FWQE_AESOURCE);
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set_64bit_val(wqe, 8, temp);
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header = qp->qp_uk.qp_id |
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LS_64(I40IW_CQP_OP_GEN_AE, I40IW_CQPSQ_OPCODE) |
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LS_64(1, I40IW_CQPSQ_FWQE_GENERATE_AE) |
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LS_64(cqp->polarity, I40IW_CQPSQ_WQEVALID);
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i40iw_insert_wqe_hdr(wqe, header);
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i40iw_debug_buf(cqp->dev, I40IW_DEBUG_WQE, "GEN_AE WQE",
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wqe, I40IW_CQP_WQE_SIZE * 8);
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if (post_sq)
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i40iw_sc_cqp_post_sq(cqp);
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return 0;
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}
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/**
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* i40iw_sc_qp_upload_context - upload qp's context
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* @dev: sc device struct
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@@ -4148,6 +4189,13 @@ static enum i40iw_status_code i40iw_exec_cqp_cmd(struct i40iw_sc_dev *dev,
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pcmdinfo->in.u.qp_flush_wqes.
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scratch, pcmdinfo->post_sq);
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break;
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case OP_GEN_AE:
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status = i40iw_sc_gen_ae(
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pcmdinfo->in.u.gen_ae.qp,
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&pcmdinfo->in.u.gen_ae.info,
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pcmdinfo->in.u.gen_ae.scratch,
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pcmdinfo->post_sq);
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break;
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case OP_ADD_ARP_CACHE_ENTRY:
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status = i40iw_sc_add_arp_cache_entry(
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pcmdinfo->in.u.add_arp_cache_entry.cqp,
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