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drm/i915: Split i915_gem_timeline into individual timelines

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We need to move to a more flexible timeline that doesn't assume one
fence context per engine, and so allow for a single timeline to be used
across a combination of engines. This means that preallocating a fence
context per engine is now a hindrance, and so we want to introduce the
singular timeline. From the code perspective, this has the notable
advantage of clearing up a lot of mirky semantics and some clumsy
pointer chasing.

By splitting the timeline up into a single entity rather than an array
of per-engine timelines, we can realise the goal of the previous patch
of tracking the timeline alongside the ring.

v2: Tweak wait_for_idle to stop the compiling thinking that ret may be
uninitialised.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180502163839.3248-2-chris@chris-wilson.co.uk
This commit is contained in:
Chris Wilson
2018-05-02 17:38:39 +01:00
parent 65fcb8064d
commit a89d1f921c
24 changed files with 397 additions and 582 deletions
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11
drivers/gpu/drm/i915/intel_ringbuffer.h
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@@ -6,12 +6,12 @@
#include <linux/seqlock.h>
#include "i915_gem_batch_pool.h"
#include "i915_gem_timeline.h"
#include "i915_reg.h"
#include "i915_pmu.h"
#include "i915_request.h"
#include "i915_selftest.h"
#include "i915_timeline.h"
#include "intel_gpu_commands.h"
struct drm_printer;
@@ -129,7 +129,7 @@ struct intel_ring {
struct i915_vma *vma;
void *vaddr;
struct intel_timeline *timeline;
struct i915_timeline *timeline;
struct list_head request_list;
struct list_head active_link;
@@ -338,7 +338,8 @@ struct intel_engine_cs {
u32 mmio_base;
struct intel_ring *buffer;
struct intel_timeline *timeline;
struct i915_timeline timeline;
struct drm_i915_gem_object *default_state;
@@ -770,7 +771,7 @@ intel_write_status_page(struct intel_engine_cs *engine, int reg, u32 value)
struct intel_ring *
intel_engine_create_ring(struct intel_engine_cs *engine,
struct i915_gem_timeline *timeline,
struct i915_timeline *timeline,
int size);
int intel_ring_pin(struct intel_ring *ring,
struct drm_i915_private *i915,
@@ -889,7 +890,7 @@ static inline u32 intel_engine_last_submit(struct intel_engine_cs *engine)
* wtih serialising this hint with anything, so document it as
* a hint and nothing more.
*/
return READ_ONCE(engine->timeline->seqno);
return READ_ONCE(engine->timeline.seqno);
}
void intel_engine_get_instdone(struct intel_engine_cs *engine,