clk: tegra: remove bogus PCIE_XCLK
The "pcie_xclk" clock is not actually a clock at all, but rather a reset domain. Now that the custom Tegra module reset API has been removed, we can remove the definition of any "clocks" that existed solely to support it. Signed-off-by: Stephen Warren <swarren@nvidia.com> Reviewed-by: Thierry Reding <treding@nvidia.com> Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
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@@ -92,7 +92,7 @@
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#define TEGRA20_CLK_OWR 71
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#define TEGRA20_CLK_AFI 72
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#define TEGRA20_CLK_CSITE 73
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#define TEGRA20_CLK_PCIE_XCLK 74
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/* 74 */
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#define TEGRA20_CLK_AVPUCQ 75
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#define TEGRA20_CLK_LA 76
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/* 77 */
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@@ -92,7 +92,7 @@
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#define TEGRA30_CLK_OWR 71
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#define TEGRA30_CLK_AFI 72
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#define TEGRA30_CLK_CSITE 73
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#define TEGRA30_CLK_PCIEX 74
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/* 74 */
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#define TEGRA30_CLK_AVPUCQ 75
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#define TEGRA30_CLK_LA 76
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/* 77 */
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