Merge tag 'powerpc-5.2-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc fixes from Michael Ellerman: "This is a frustratingly large batch at rc5. Some of these were sent earlier but were missed by me due to being distracted by other things, and some took a while to track down due to needing manual bisection on old hardware. But still we clearly need to improve our testing of KVM, and of 32-bit, so that we catch these earlier. Summary: seven fixes, all for bugs introduced this cycle. - The commit to add KASAN support broke booting on 32-bit SMP machines, due to a refactoring that moved some setup out of the secondary CPU path. - A fix for another 32-bit SMP bug introduced by the fast syscall entry implementation for 32-bit BOOKE. And a build fix for the same commit. - Our change to allow the DAWR to be force enabled on Power9 introduced a bug in KVM, where we clobber r3 leading to a host crash. - The same commit also exposed a previously unreachable bug in the nested KVM handling of DAWR, which could lead to an oops in a nested host. - One of the DMA reworks broke the b43legacy WiFi driver on some people's powermacs, fix it by enabling a 30-bit ZONE_DMA on 32-bit. - A fix for TLB flushing in KVM introduced a new bug, as it neglected to also flush the ERAT, this could lead to memory corruption in the guest. Thanks to: Aaro Koskinen, Christoph Hellwig, Christophe Leroy, Larry Finger, Michael Neuling, Suraj Jitindar Singh" * tag 'powerpc-5.2-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: KVM: PPC: Book3S HV: Invalidate ERAT when flushing guest TLB entries powerpc: enable a 30-bit ZONE_DMA for 32-bit pmac KVM: PPC: Book3S HV: Only write DAWR[X] when handling h_set_dawr in real mode KVM: PPC: Book3S HV: Fix r3 corruption in h_set_dabr() powerpc/32: fix build failure on book3e with KVM powerpc/booke: fix fast syscall entry on SMP powerpc/32s: fix initial setup of segment registers on secondary CPU
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@@ -752,6 +752,7 @@ __secondary_start:
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stw r0,0(r3)
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/* load up the MMU */
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bl load_segment_registers
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bl load_up_mmu
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/* ptr to phys current thread */
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@@ -83,7 +83,7 @@ END_BTB_FLUSH_SECTION
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SAVE_4GPRS(3, r11); \
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SAVE_2GPRS(7, r11)
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.macro SYSCALL_ENTRY trapno intno
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.macro SYSCALL_ENTRY trapno intno srr1
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mfspr r10, SPRN_SPRG_THREAD
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#ifdef CONFIG_KVM_BOOKE_HV
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BEGIN_FTR_SECTION
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@@ -94,7 +94,7 @@ BEGIN_FTR_SECTION
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mfspr r11, SPRN_SRR1
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mtocrf 0x80, r11 /* check MSR[GS] without clobbering reg */
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bf 3, 1975f
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b kvmppc_handler_BOOKE_INTERRUPT_\intno\()_SPRN_SRR1
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b kvmppc_handler_\intno\()_\srr1
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1975:
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mr r12, r13
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lwz r13, THREAD_NORMSAVE(2)(r10)
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@@ -145,9 +145,9 @@ ALT_FTR_SECTION_END_IFSET(CPU_FTR_EMB_HV)
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tophys(r11,r11)
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addi r11,r11,global_dbcr0@l
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#ifdef CONFIG_SMP
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lwz r9,TASK_CPU(r2)
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slwi r9,r9,3
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add r11,r11,r9
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lwz r10, TASK_CPU(r2)
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slwi r10, r10, 3
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add r11, r11, r10
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#endif
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lwz r12,0(r11)
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mtspr SPRN_DBCR0,r12
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@@ -409,7 +409,7 @@ interrupt_base:
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/* System Call Interrupt */
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START_EXCEPTION(SystemCall)
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SYSCALL_ENTRY 0xc00 SYSCALL
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SYSCALL_ENTRY 0xc00 BOOKE_INTERRUPT_SYSCALL SPRN_SRR1
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/* Auxiliary Processor Unavailable Interrupt */
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EXCEPTION(0x2900, AP_UNAVAIL, AuxillaryProcessorUnavailable, \
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