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edac: Create a dimm struct and move the labels into it

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The way a DIMM is currently represented implies that they're
linked into a per-csrow struct. However, some drivers don't see
csrows, as they're ridden behind some chip like the AMB's
on FBDIMM's, for example.

This forced drivers to fake^Wvirtualize a csrow struct, and to create
a mess under csrow/channel original's concept.

Move the DIMM labels into a per-DIMM struct, and add there
the real location of the socket, in terms of csrow/channel.
Latter patches will modify the location to properly represent the
memory architecture.

All other drivers will use a per-csrow type of location.
Some of those drivers will require a latter conversion, as
they also fake the csrows internally.

TODO: While this patch doesn't change the existing behavior, on
csrows-based memory controllers, a csrow/channel pair points to a memory
rank. There's a known bug at the EDAC core that allows having different
labels for the same DIMM, if it has more than one rank. A latter patch
is need to merge the several ranks for a DIMM into the same dimm_info
struct, in order to avoid having different labels for the same DIMM.

The edac_mc_alloc() will now contain a per-dimm initialization loop that
will be changed by latter patches in order to match other types of
memory architectures.

Reviewed-by: Aristeu Rozanski <arozansk@redhat.com>
Reviewed-by: Borislav Petkov <borislav.petkov@amd.com>
Cc: Doug Thompson <norsk5@yahoo.com>
Cc: Ranganathan Desikan <ravi@jetztechnologies.com>
Cc: "Arvind R." <arvino55@gmail.com>
Cc: "Niklas Söderlund" <niklas.soderlund@ericsson.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Mauro Carvalho Chehab
2012-01-27 14:12:32 -03:00
parent 76e10d158e
commit a7d7d2e1a0
7 changed files with 72 additions and 32 deletions
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28
include/linux/edac.h
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@@ -312,23 +312,34 @@ enum scrub_type {
* PS - I enjoyed writing all that about as much as you enjoyed reading it.
*/
/* FIXME: add a per-dimm ce error count */
struct dimm_info {
char label[EDAC_MC_LABEL_LEN + 1]; /* DIMM label on motherboard */
unsigned memory_controller;
unsigned csrow;
unsigned csrow_channel;
};
/**
* struct rank_info - contains the information for one DIMM rank
*
* @chan_idx: channel number where the rank is (typically, 0 or 1)
* @ce_count: number of correctable errors for this rank
* @label: DIMM label. Different ranks for the same DIMM should be
* filled, on userspace, with the same label.
* FIXME: The core currently won't enforce it.
* @csrow: A pointer to the chip select row structure (the parent
* structure). The location of the rank is given by
* the (csrow->csrow_idx, chan_idx) vector.
* @dimm: A pointer to the DIMM structure, where the DIMM label
* information is stored.
*
* FIXME: Currently, the EDAC core model will assume one DIMM per rank.
* This is a bad assumption, but it makes this patch easier. Later
* patches in this series will fix this issue.
*/
struct rank_info {
int chan_idx;
u32 ce_count;
char label[EDAC_MC_LABEL_LEN + 1];
struct csrow_info *csrow; /* the parent */
struct csrow_info *csrow;
struct dimm_info *dimm;
};
struct csrow_info {
@@ -428,6 +439,13 @@ struct mem_ctl_info {
int mc_idx;
int nr_csrows;
struct csrow_info *csrows;
/*
* DIMM info. Will eventually remove the entire csrows_info some day
*/
unsigned nr_dimms;
struct dimm_info *dimms;
/*
* FIXME - what about controllers on other busses? - IDs must be
* unique. dev pointer should be sufficiently unique, but