drm/nouveau/fifo/gk104-: require explicit runlist selection for channel allocation
We didn't used to be aware that runlist/engine IDs weren't the same thing, or that there was such variability in configuration between GPUs. By exposing this information to a client, and giving it explicit control of which runlist it's allocating a channel on, we're able to make better choices. The immediate effect of this is that on GPUs where CE0 is the "GRCE", we will now be allocating a copy engine running asynchronously to GR for BO migrations - as intended. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@@ -214,7 +214,7 @@ nouveau_channel_prep(struct nouveau_drm *drm, struct nvif_device *device,
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static int
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nouveau_channel_ind(struct nouveau_drm *drm, struct nvif_device *device,
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u32 engine, struct nouveau_channel **pchan)
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u64 runlist, struct nouveau_channel **pchan)
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{
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struct nouveau_cli *cli = (void *)device->object.client;
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static const u16 oclasses[] = { PASCAL_CHANNEL_GPFIFO_A,
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@@ -245,9 +245,9 @@ nouveau_channel_ind(struct nouveau_drm *drm, struct nvif_device *device,
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do {
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if (oclass[0] >= KEPLER_CHANNEL_GPFIFO_A) {
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args.kepler.version = 0;
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args.kepler.engines = engine;
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args.kepler.ilength = 0x02000;
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args.kepler.ioffset = 0x10000 + chan->push.addr;
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args.kepler.runlist = runlist;
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args.kepler.vmm = nvif_handle(&cli->vmm.vmm.object);
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size = sizeof(args.kepler);
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} else
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