dma-mapping: treat dev->bus_dma_mask as a DMA limit
Using a mask to represent bus DMA constraints has a set of limitations. The biggest one being it can only hold a power of two (minus one). The DMA mapping code is already aware of this and treats dev->bus_dma_mask as a limit. This quirk is already used by some architectures although still rare. With the introduction of the Raspberry Pi 4 we've found a new contender for the use of bus DMA limits, as its PCIe bus can only address the lower 3GB of memory (of a total of 4GB). This is impossible to represent with a mask. To make things worse the device-tree code rounds non power of two bus DMA limits to the next power of two, which is unacceptable in this case. In the light of this, rename dev->bus_dma_mask to dev->bus_dma_limit all over the tree and treat it as such. Note that dev->bus_dma_limit should contain the higher accessible DMA address. Signed-off-by: Nicolas Saenz Julienne <nsaenzjulienne@suse.de> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Christoph Hellwig <hch@lst.de>
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Christoph Hellwig

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@@ -1186,8 +1186,8 @@ struct dev_links_info {
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* @coherent_dma_mask: Like dma_mask, but for alloc_coherent mapping as not all
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* hardware supports 64-bit addresses for consistent allocations
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* such descriptors.
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* @bus_dma_mask: Mask of an upstream bridge or bus which imposes a smaller DMA
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* limit than the device itself supports.
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* @bus_dma_limit: Limit of an upstream bridge or bus which imposes a smaller
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* DMA limit than the device itself supports.
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* @dma_pfn_offset: offset of DMA memory range relatively of RAM
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* @dma_parms: A low level driver may set these to teach IOMMU code about
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* segment limitations.
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@@ -1270,7 +1270,7 @@ struct device {
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not all hardware supports
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64 bit addresses for consistent
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allocations such descriptors. */
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u64 bus_dma_mask; /* upstream dma_mask constraint */
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u64 bus_dma_limit; /* upstream dma constraint */
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unsigned long dma_pfn_offset;
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struct device_dma_parameters *dma_parms;
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