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ARM: at91: add ram controller DT support

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We can now drop the call to ioremap_registers() as we have the binding for the
SDRAM/DDR Controller.

Drop ioremap_registers() for sam9x5 too.

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Rob Herring <rob.herring@calxeda.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
This commit is contained in:
Jean-Christophe PLAGNIOL-VILLARD
2012-03-02 20:54:37 +08:00
parent c8082d344a
commit a7776ec625
8 changed files with 72 additions and 27 deletions
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6
arch/arm/mach-at91/at91sam9x5.c
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@@ -299,11 +299,6 @@ static void __init at91sam9x5_map_io(void)
at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE);
}
static void __init at91sam9x5_ioremap_registers(void)
{
at91_ioremap_ramc(0, AT91SAM9X5_BASE_DDRSDRC0, 512);
}
void __init at91sam9x5_initialize(void)
{
at91_extern_irq = (1 << AT91SAM9X5_ID_IRQ0);
@@ -356,7 +351,6 @@ static unsigned int at91sam9x5_default_irq_priority[NR_AIC_IRQS] __initdata = {
struct at91_init_soc __initdata at91sam9x5_soc = {
.map_io = at91sam9x5_map_io,
.default_irq_priority = at91sam9x5_default_irq_priority,
.ioremap_registers = at91sam9x5_ioremap_registers,
.register_clocks = at91sam9x5_register_clocks,
.init = at91sam9x5_initialize,
};