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ARM: shmobile: r8a7790: Add Audio CTU support on DTSI

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Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Tested-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Kuninori Morimoto
2015-07-21 00:26:20 +00:00
committed by Simon Horman
parent 850346eccc
commit a716378496
2 changed files with 18 additions and 0 deletions
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16
arch/arm/boot/dts/r8a7790.dtsi
View File

@@ -1303,6 +1303,7 @@
<&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
<&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
<&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
<&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>,
<&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>; <&mstp10_clks R8A7790_CLK_SCU_ALL>, <&mstp10_clks R8A7790_CLK_SCU_ALL>;
#clock-cells = <1>; #clock-cells = <1>;
@@ -1312,6 +1313,7 @@
R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 R8A7790_CLK_SSI1 R8A7790_CLK_SSI0 R8A7790_CLK_SSI4 R8A7790_CLK_SSI3 R8A7790_CLK_SSI2 R8A7790_CLK_SSI1 R8A7790_CLK_SSI0
R8A7790_CLK_SCU_ALL R8A7790_CLK_SCU_ALL
R8A7790_CLK_SCU_DVC1 R8A7790_CLK_SCU_DVC0 R8A7790_CLK_SCU_DVC1 R8A7790_CLK_SCU_DVC0
R8A7790_CLK_SCU_CTU1_MIX1 R8A7790_CLK_SCU_CTU0_MIX0
R8A7790_CLK_SCU_SRC9 R8A7790_CLK_SCU_SRC8 R8A7790_CLK_SCU_SRC7 R8A7790_CLK_SCU_SRC6 R8A7790_CLK_SCU_SRC5 R8A7790_CLK_SCU_SRC9 R8A7790_CLK_SCU_SRC8 R8A7790_CLK_SCU_SRC7 R8A7790_CLK_SCU_SRC6 R8A7790_CLK_SCU_SRC5
R8A7790_CLK_SCU_SRC4 R8A7790_CLK_SCU_SRC3 R8A7790_CLK_SCU_SRC2 R8A7790_CLK_SCU_SRC1 R8A7790_CLK_SCU_SRC0 R8A7790_CLK_SCU_SRC4 R8A7790_CLK_SCU_SRC3 R8A7790_CLK_SCU_SRC2 R8A7790_CLK_SCU_SRC1 R8A7790_CLK_SCU_SRC0
>; >;
@@ -1321,6 +1323,7 @@
"ssi4", "ssi3", "ssi2", "ssi1", "ssi0", "ssi4", "ssi3", "ssi2", "ssi1", "ssi0",
"scu-all", "scu-all",
"scu-dvc1", "scu-dvc0", "scu-dvc1", "scu-dvc0",
"scu-ctu1-mix1", "scu-ctu0-mix0",
"scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5", "scu-src9", "scu-src8", "scu-src7", "scu-src6", "scu-src5",
"scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0"; "scu-src4", "scu-src3", "scu-src2", "scu-src1", "scu-src0";
}; };
@@ -1536,6 +1539,7 @@
<&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>, <&mstp10_clks R8A7790_CLK_SCU_SRC5>, <&mstp10_clks R8A7790_CLK_SCU_SRC4>,
<&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>, <&mstp10_clks R8A7790_CLK_SCU_SRC3>, <&mstp10_clks R8A7790_CLK_SCU_SRC2>,
<&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>, <&mstp10_clks R8A7790_CLK_SCU_SRC1>, <&mstp10_clks R8A7790_CLK_SCU_SRC0>,
<&mstp10_clks R8A7790_CLK_SCU_CTU0_MIX0>, <&mstp10_clks R8A7790_CLK_SCU_CTU1_MIX1>,
<&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>, <&mstp10_clks R8A7790_CLK_SCU_DVC0>, <&mstp10_clks R8A7790_CLK_SCU_DVC1>,
<&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>; <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, <&m2_clk>;
clock-names = "ssi-all", clock-names = "ssi-all",
@@ -1543,6 +1547,7 @@
"ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0", "ssi.4", "ssi.3", "ssi.2", "ssi.1", "ssi.0",
"src.9", "src.8", "src.7", "src.6", "src.5", "src.9", "src.8", "src.7", "src.6", "src.5",
"src.4", "src.3", "src.2", "src.1", "src.0", "src.4", "src.3", "src.2", "src.1", "src.0",
"ctu.0", "ctu.1",
"dvc.0", "dvc.1", "dvc.0", "dvc.1",
"clk_a", "clk_b", "clk_c", "clk_i"; "clk_a", "clk_b", "clk_c", "clk_i";
@@ -1559,6 +1564,17 @@
}; };
}; };
rcar_sound,ctu {
ctu00: ctu@0 { };
ctu01: ctu@1 { };
ctu02: ctu@2 { };
ctu03: ctu@3 { };
ctu10: ctu@4 { };
ctu11: ctu@5 { };
ctu12: ctu@6 { };
ctu13: ctu@7 { };
};
rcar_sound,src { rcar_sound,src {
src0: src@0 { src0: src@0 {
interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>; interrupts = <0 352 IRQ_TYPE_LEVEL_HIGH>;

2
include/dt-bindings/clock/r8a7790-clock.h
View File

@@ -144,6 +144,8 @@
#define R8A7790_CLK_SCU_ALL 17 #define R8A7790_CLK_SCU_ALL 17
#define R8A7790_CLK_SCU_DVC1 18 #define R8A7790_CLK_SCU_DVC1 18
#define R8A7790_CLK_SCU_DVC0 19 #define R8A7790_CLK_SCU_DVC0 19
#define R8A7790_CLK_SCU_CTU1_MIX1 20
#define R8A7790_CLK_SCU_CTU0_MIX0 21
#define R8A7790_CLK_SCU_SRC9 22 #define R8A7790_CLK_SCU_SRC9 22
#define R8A7790_CLK_SCU_SRC8 23 #define R8A7790_CLK_SCU_SRC8 23
#define R8A7790_CLK_SCU_SRC7 24 #define R8A7790_CLK_SCU_SRC7 24