Merge tag 'drm-next-2019-11-27' of git://anongit.freedesktop.org/drm/drm
Pull drm updates from Dave Airlie: "Lots of stuff in here, though it hasn't been too insane this merge apart from dealing with the security fun. uapi: - export different colorspace properties on DP vs HDMI - new fourcc for ARM 16x16 block format - syncobj: allow querying last submitted timeline value - DRM_FORMAT_BIG_ENDIAN defined as unsigned core: - allow using gem vma manager in ttm - connector/encoder/bridge doc fixes - allow more than 3 encoders for a connector - displayport mst suspend/resume reprobing support - vram lazy unmapping, uniform vram mm and gem vram - edid cleanups + AVI informframe bar info - displayport helpers - dpcd parser added dp_cec: - Allow a connector to be associated with a cec device ttm: - pipelining with no_gpu_wait fix - always keep BOs on the LRU sched: - allow free_job routine to sleep i915: - Block userptr from mappable GTT - i915 perf uapi versioning - OA stream dynamic reconfiguration - make context persistence optional - introduce DRM_I915_UNSTABLE Kconfig - add fake lmem testing under unstable - BT.2020 support for DP MSA - struct mutex elimination - Tigerlake display/PLL/power management improvements - Jasper Lake PCH support - refactor PMU for multiple GPUs - Icelake firmware update - Split out vga + switcheroo code amdgpu: - implement dma-buf import/export without helpers - vega20 RAS enablement - DC i2c over aux fixes - renoir GPU reset - DC HDCP support - BACO support for CI/VI asics - MSI-X support - Arcturus EEPROM support - Arcturus VCN encode support - VCN dynamic powergating on RV/RV2 amdkfd: - add navi12/14/renoir support to kfd radeon: - SI dpm fix ported from amdgpu - fix bad DMA on ppc platforms gma500: - memory leak fixes qxl: - convert to new gem mmap exynos: - build warning fix komeda: - add aclk sysfs attribute v3d: - userspace cleanup uapi change i810: - fix for underflow in dispatch ioctls ast: - refactor show_cursor mgag200: - refactor show_cursor arcgpu: - encoder finding improvements mediatek: - mipi_tx, dsi and partial crtc support for MT8183 SoC - rotation support meson: - add suspend/resume support omap: - misc refactors tegra: - DisplayPort support for Tegra 210, 186 and 194. - IOMMU-backed DMA API fixes panfrost: - fix lockdep issue - simplify devfreq integration rcar-du: - R8A774B1 SoC support - fixes for H2 ES2.0 sun4i: - vcc-dsi regulator support virtio-gpu: - vmexit vs spinlock fix - move to gem shmem helpers - handle large command buffers with cma" * tag 'drm-next-2019-11-27' of git://anongit.freedesktop.org/drm/drm: (1855 commits) drm/amdgpu: invalidate mmhub semaphore workaround in gmc9/gmc10 drm/amdgpu: initialize vm_inv_eng0_sem for gfxhub and mmhub drm/amd/amdgpu/sriov skip RLCG s/r list for arcturus VF. drm/amd/amdgpu/sriov temporarily skip ras,dtm,hdcp for arcturus VF drm/amdgpu/gfx10: re-init clear state buffer after gpu reset merge fix for "ftrace: Rework event_create_dir()" drm/amdgpu: Update Arcturus golden registers drm/amdgpu/gfx10: fix out-of-bound mqd_backup array access drm/amdgpu/gfx10: explicitly wait for cp idle after halt/unhalt Revert "drm/amd/display: enable S/G for RAVEN chip" drm/amdgpu: disable gfxoff on original raven drm/amdgpu: remove experimental flag for Navi14 drm/amdgpu: disable gfxoff when using register read interface drm/amdgpu/powerplay: properly set PP_GFXOFF_MASK (v2) drm/amdgpu: fix bad DMA from INTERRUPT_CNTL2 drm/radeon: fix bad DMA from INTERRUPT_CNTL2 drm/amd/display: Fix debugfs on MST connectors drm/amdgpu/nv: add asic func for fetching vbios from rom directly drm/amdgpu: put flush_delayed_work at first drm/amdgpu/vcn2.5: fix the enc loop with hw fini ...
This commit is contained in:
@@ -36,6 +36,9 @@ properties:
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resets:
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maxItems: 1
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vcc-dsi-supply:
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description: VCC-DSI power supply of the DSI encoder
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phys:
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maxItems: 1
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@@ -64,6 +67,7 @@ required:
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- phys
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- phy-names
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- resets
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- vcc-dsi-supply
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- port
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additionalProperties: false
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@@ -79,6 +83,7 @@ examples:
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resets = <&ccu 4>;
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phys = <&dphy0>;
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phy-names = "dphy";
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vcc-dsi-supply = <®_dcdc1>;
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#address-cells = <1>;
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#size-cells = <0>;
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@@ -37,6 +37,8 @@ Optional properties:
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Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt)
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to be used for the framebuffer; if not present, the framebuffer may
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be located anywhere in memory.
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- arm,malidp-arqos-high-level: integer of u32 value describing the ARQoS
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levels of DP500's QoS signaling.
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Example:
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@@ -54,6 +56,7 @@ Example:
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clocks = <&oscclk2>, <&fpgaosc0>, <&fpgaosc1>, <&fpgaosc1>;
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clock-names = "pxlclk", "mclk", "aclk", "pclk";
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arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
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arm,malidp-arqos-high-level = <0xd000d000>;
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port {
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dp0_output: endpoint {
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remote-endpoint = <&tda998x_2_input>;
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@@ -6,7 +6,11 @@ designed for portable devices.
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Required properties:
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- compatible : "analogix,anx7814"
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- compatible : Must be one of:
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"analogix,anx7808"
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"analogix,anx7812"
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"analogix,anx7814"
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"analogix,anx7818"
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- reg : I2C address of the device
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- interrupts : Should contain the INTP interrupt
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- hpd-gpios : Which GPIO to use for hpd
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@@ -13,6 +13,7 @@ Required properties:
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- compatible : Shall contain one or more of
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- "renesas,r8a774a1-hdmi" for R8A774A1 (RZ/G2M) compatible HDMI TX
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- "renesas,r8a774b1-hdmi" for R8A774B1 (RZ/G2N) compatible HDMI TX
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- "renesas,r8a7795-hdmi" for R8A7795 (R-Car H3) compatible HDMI TX
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- "renesas,r8a7796-hdmi" for R8A7796 (R-Car M3-W) compatible HDMI TX
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- "renesas,r8a77965-hdmi" for R8A77965 (R-Car M3-N) compatible HDMI TX
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@@ -10,6 +10,7 @@ Required properties:
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- "renesas,r8a7743-lvds" for R8A7743 (RZ/G1M) compatible LVDS encoders
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- "renesas,r8a7744-lvds" for R8A7744 (RZ/G1N) compatible LVDS encoders
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- "renesas,r8a774a1-lvds" for R8A774A1 (RZ/G2M) compatible LVDS encoders
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- "renesas,r8a774b1-lvds" for R8A774B1 (RZ/G2N) compatible LVDS encoders
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- "renesas,r8a774c0-lvds" for R8A774C0 (RZ/G2E) compatible LVDS encoders
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- "renesas,r8a7790-lvds" for R8A7790 (R-Car H2) compatible LVDS encoders
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- "renesas,r8a7791-lvds" for R8A7791 (R-Car M2-W) compatible LVDS encoders
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@@ -27,19 +27,22 @@ Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt.
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Required properties (all function blocks):
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- compatible: "mediatek,<chip>-disp-<function>", one of
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"mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
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"mediatek,<chip>-disp-rdma" - read DMA / line buffer
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"mediatek,<chip>-disp-wdma" - write DMA
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"mediatek,<chip>-disp-color" - color processor
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"mediatek,<chip>-disp-aal" - adaptive ambient light controller
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"mediatek,<chip>-disp-gamma" - gamma correction
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"mediatek,<chip>-disp-merge" - merge streams from two RDMA sources
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"mediatek,<chip>-disp-split" - split stream to two encoders
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"mediatek,<chip>-disp-ufoe" - data compression engine
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"mediatek,<chip>-dsi" - DSI controller, see mediatek,dsi.txt
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"mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt
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"mediatek,<chip>-disp-mutex" - display mutex
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"mediatek,<chip>-disp-od" - overdrive
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"mediatek,<chip>-disp-ovl" - overlay (4 layers, blending, csc)
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"mediatek,<chip>-disp-ovl-2l" - overlay (2 layers, blending, csc)
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"mediatek,<chip>-disp-rdma" - read DMA / line buffer
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"mediatek,<chip>-disp-wdma" - write DMA
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"mediatek,<chip>-disp-ccorr" - color correction
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"mediatek,<chip>-disp-color" - color processor
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"mediatek,<chip>-disp-dither" - dither
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"mediatek,<chip>-disp-aal" - adaptive ambient light controller
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"mediatek,<chip>-disp-gamma" - gamma correction
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"mediatek,<chip>-disp-merge" - merge streams from two RDMA sources
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"mediatek,<chip>-disp-split" - split stream to two encoders
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"mediatek,<chip>-disp-ufoe" - data compression engine
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"mediatek,<chip>-dsi" - DSI controller, see mediatek,dsi.txt
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"mediatek,<chip>-dpi" - DPI controller, see mediatek,dpi.txt
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"mediatek,<chip>-disp-mutex" - display mutex
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"mediatek,<chip>-disp-od" - overdrive
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the supported chips are mt2701, mt2712 and mt8173.
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- reg: Physical base address and length of the function block register space
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- interrupts: The interrupt signal from the function block (required, except for
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@@ -49,6 +52,7 @@ Required properties (all function blocks):
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For most function blocks this is just a single clock input. Only the DSI and
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DPI controller nodes have multiple clock inputs. These are documented in
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mediatek,dsi.txt and mediatek,dpi.txt, respectively.
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An exception is that the mt8183 mutex is always free running with no clocks property.
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Required properties (DMA function blocks):
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- compatible: Should be one of
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@@ -7,7 +7,7 @@ channel output.
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Required properties:
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- compatible: "mediatek,<chip>-dsi"
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the supported chips are mt2701 and mt8173.
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the supported chips are mt2701, mt8173 and mt8183.
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- reg: Physical base address and length of the controller's registers
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- interrupts: The interrupt signal from the function block.
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- clocks: device clocks
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@@ -26,7 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY.
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Required properties:
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- compatible: "mediatek,<chip>-mipi-tx"
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the supported chips are mt2701 and mt8173.
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the supported chips are mt2701, mt8173 and mt8183.
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- reg: Physical base address and length of the controller's registers
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- clocks: PLL reference clock
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- clock-output-names: name of the output clock line to the DSI encoder
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@@ -8,6 +8,7 @@ Required Properties:
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- "renesas,du-r8a7745" for R8A7745 (RZ/G1E) compatible DU
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- "renesas,du-r8a77470" for R8A77470 (RZ/G1C) compatible DU
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- "renesas,du-r8a774a1" for R8A774A1 (RZ/G2M) compatible DU
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- "renesas,du-r8a774b1" for R8A774B1 (RZ/G2N) compatible DU
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- "renesas,du-r8a774c0" for R8A774C0 (RZ/G2E) compatible DU
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- "renesas,du-r8a7779" for R8A7779 (R-Car H1) compatible DU
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- "renesas,du-r8a7790" for R8A7790 (R-Car H2) compatible DU
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@@ -60,6 +61,7 @@ corresponding to each DU output.
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R8A7745 (RZ/G1E) DPAD 0 DPAD 1 - -
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R8A77470 (RZ/G1C) DPAD 0 DPAD 1 LVDS 0 -
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R8A774A1 (RZ/G2M) DPAD 0 HDMI 0 LVDS 0 -
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R8A774B1 (RZ/G2N) DPAD 0 HDMI 0 LVDS 0 -
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R8A774C0 (RZ/G2E) DPAD 0 LVDS 0 LVDS 1 -
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R8A7779 (R-Car H1) DPAD 0 DPAD 1 - -
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R8A7790 (R-Car H2) DPAD 0 LVDS 0 LVDS 1 -
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@@ -20,6 +20,10 @@ Required properties:
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"rockchip,rk3228-vop";
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"rockchip,rk3328-vop";
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- reg: Must contain one entry corresponding to the base address and length
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of the register space. Can optionally contain a second entry
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corresponding to the CRTC gamma LUT address.
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- interrupts: should contain a list of all VOP IP block interrupts in the
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order: VSYNC, LCD_SYSTEM. The interrupt specifier
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format depends on the interrupt controller used.
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@@ -48,7 +52,7 @@ Example:
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SoC specific DT entry:
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vopb: vopb@ff930000 {
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compatible = "rockchip,rk3288-vop";
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reg = <0xff930000 0x19c>;
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reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>;
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
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clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
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