Merge branch 'x86-bootmem-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-bootmem-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip: (30 commits) early_res: Need to save the allocation name in drop_range_partial() sparsemem: Fix compilation on PowerPC early_res: Add free_early_partial() x86: Fix non-bootmem compilation on PowerPC core: Move early_res from arch/x86 to kernel/ x86: Add find_fw_memmap_area Move round_up/down to kernel.h x86: Make 32bit support NO_BOOTMEM early_res: Enhance check_and_double_early_res x86: Move back find_e820_area to e820.c x86: Add find_early_area_size x86: Separate early_res related code from e820.c x86: Move bios page reserve early to head32/64.c sparsemem: Put mem map for one node together. sparsemem: Put usemap for one node together x86: Make 64 bit use early_res instead of bootmem before slab x86: Only call dma32_reserve_bootmem 64bit !CONFIG_NUMA x86: Make early_node_mem get mem > 4 GB if possible x86: Dynamically increase early_res array size x86: Introduce max_early_res and early_res_count ...
This commit is contained in:
Linus Torvalds
@@ -14,8 +14,7 @@ obj-$(CONFIG_X86_VISWS) += visws.o
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obj-$(CONFIG_X86_NUMAQ) += numaq_32.o
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obj-y += common.o early.o
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obj-y += amd_bus.o
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obj-$(CONFIG_X86_64) += bus_numa.o
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obj-y += amd_bus.o bus_numa.o
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ifeq ($(CONFIG_PCI_DEBUG),y)
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EXTRA_CFLAGS += -DDEBUG
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@@ -2,11 +2,11 @@
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#include <linux/pci.h>
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#include <linux/topology.h>
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#include <linux/cpu.h>
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#include <linux/range.h>
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#include <asm/pci_x86.h>
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#ifdef CONFIG_X86_64
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#include <asm/pci-direct.h>
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#endif
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#include "bus_numa.h"
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@@ -15,60 +15,6 @@
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* also get peer root bus resource for io,mmio
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*/
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#ifdef CONFIG_X86_64
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#define RANGE_NUM 16
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struct res_range {
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size_t start;
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size_t end;
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};
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static void __init update_range(struct res_range *range, size_t start,
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size_t end)
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{
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int i;
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int j;
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for (j = 0; j < RANGE_NUM; j++) {
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if (!range[j].end)
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continue;
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if (start <= range[j].start && end >= range[j].end) {
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range[j].start = 0;
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range[j].end = 0;
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continue;
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}
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if (start <= range[j].start && end < range[j].end && range[j].start < end + 1) {
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range[j].start = end + 1;
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continue;
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}
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if (start > range[j].start && end >= range[j].end && range[j].end > start - 1) {
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range[j].end = start - 1;
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continue;
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}
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if (start > range[j].start && end < range[j].end) {
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/* find the new spare */
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for (i = 0; i < RANGE_NUM; i++) {
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if (range[i].end == 0)
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break;
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}
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if (i < RANGE_NUM) {
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range[i].end = range[j].end;
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range[i].start = end + 1;
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} else {
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printk(KERN_ERR "run of slot in ranges\n");
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}
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range[j].end = start - 1;
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continue;
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}
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}
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}
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struct pci_hostbridge_probe {
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u32 bus;
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u32 slot;
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@@ -111,6 +57,8 @@ static void __init get_pci_mmcfg_amd_fam10h_range(void)
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fam10h_mmconf_end = base + (1ULL<<(segn_busn_bits + 20)) - 1;
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}
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#define RANGE_NUM 16
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/**
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* early_fill_mp_bus_to_node()
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* called before pcibios_scan_root and pci_scan_bus
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@@ -130,16 +78,17 @@ static int __init early_fill_mp_bus_info(void)
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struct pci_root_info *info;
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u32 reg;
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struct resource *res;
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size_t start;
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size_t end;
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struct res_range range[RANGE_NUM];
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u64 start;
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u64 end;
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struct range range[RANGE_NUM];
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u64 val;
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u32 address;
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bool found;
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if (!early_pci_allowed())
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return -1;
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found_all_numa_early = 0;
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found = false;
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for (i = 0; i < ARRAY_SIZE(pci_probes); i++) {
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u32 id;
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u16 device;
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@@ -153,12 +102,12 @@ static int __init early_fill_mp_bus_info(void)
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device = (id>>16) & 0xffff;
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if (pci_probes[i].vendor == vendor &&
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pci_probes[i].device == device) {
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found_all_numa_early = 1;
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found = true;
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break;
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}
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}
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if (!found_all_numa_early)
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if (!found)
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return 0;
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pci_root_num = 0;
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@@ -196,7 +145,7 @@ static int __init early_fill_mp_bus_info(void)
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def_link = (reg >> 8) & 0x03;
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memset(range, 0, sizeof(range));
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range[0].end = 0xffff;
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add_range(range, RANGE_NUM, 0, 0, 0xffff + 1);
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/* io port resource */
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for (i = 0; i < 4; i++) {
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reg = read_pci_config(bus, slot, 1, 0xc0 + (i << 3));
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@@ -220,13 +169,13 @@ static int __init early_fill_mp_bus_info(void)
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info = &pci_root_info[j];
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printk(KERN_DEBUG "node %d link %d: io port [%llx, %llx]\n",
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node, link, (u64)start, (u64)end);
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node, link, start, end);
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/* kernel only handle 16 bit only */
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if (end > 0xffff)
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end = 0xffff;
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update_res(info, start, end, IORESOURCE_IO, 1);
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update_range(range, start, end);
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subtract_range(range, RANGE_NUM, start, end + 1);
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}
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/* add left over io port range to def node/link, [0, 0xffff] */
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/* find the position */
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@@ -241,29 +190,32 @@ static int __init early_fill_mp_bus_info(void)
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if (!range[i].end)
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continue;
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update_res(info, range[i].start, range[i].end,
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update_res(info, range[i].start, range[i].end - 1,
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IORESOURCE_IO, 1);
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}
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}
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memset(range, 0, sizeof(range));
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/* 0xfd00000000-0xffffffffff for HT */
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range[0].end = (0xfdULL<<32) - 1;
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end = cap_resource((0xfdULL<<32) - 1);
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end++;
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add_range(range, RANGE_NUM, 0, 0, end);
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/* need to take out [0, TOM) for RAM*/
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address = MSR_K8_TOP_MEM1;
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rdmsrl(address, val);
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end = (val & 0xffffff800000ULL);
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printk(KERN_INFO "TOM: %016lx aka %ldM\n", end, end>>20);
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printk(KERN_INFO "TOM: %016llx aka %lldM\n", end, end>>20);
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if (end < (1ULL<<32))
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update_range(range, 0, end - 1);
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subtract_range(range, RANGE_NUM, 0, end);
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/* get mmconfig */
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get_pci_mmcfg_amd_fam10h_range();
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/* need to take out mmconf range */
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if (fam10h_mmconf_end) {
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printk(KERN_DEBUG "Fam 10h mmconf [%llx, %llx]\n", fam10h_mmconf_start, fam10h_mmconf_end);
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update_range(range, fam10h_mmconf_start, fam10h_mmconf_end);
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subtract_range(range, RANGE_NUM, fam10h_mmconf_start,
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fam10h_mmconf_end + 1);
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}
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/* mmio resource */
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@@ -293,7 +245,7 @@ static int __init early_fill_mp_bus_info(void)
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info = &pci_root_info[j];
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printk(KERN_DEBUG "node %d link %d: mmio [%llx, %llx]",
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node, link, (u64)start, (u64)end);
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node, link, start, end);
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/*
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* some sick allocation would have range overlap with fam10h
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* mmconf range, so need to update start and end.
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@@ -318,14 +270,15 @@ static int __init early_fill_mp_bus_info(void)
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/* we got a hole */
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endx = fam10h_mmconf_start - 1;
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update_res(info, start, endx, IORESOURCE_MEM, 0);
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update_range(range, start, endx);
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printk(KERN_CONT " ==> [%llx, %llx]", (u64)start, endx);
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subtract_range(range, RANGE_NUM, start,
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endx + 1);
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printk(KERN_CONT " ==> [%llx, %llx]", start, endx);
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start = fam10h_mmconf_end + 1;
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changed = 1;
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}
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if (changed) {
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if (start <= end) {
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printk(KERN_CONT " %s [%llx, %llx]", endx?"and":"==>", (u64)start, (u64)end);
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printk(KERN_CONT " %s [%llx, %llx]", endx ? "and" : "==>", start, end);
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} else {
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printk(KERN_CONT "%s\n", endx?"":" ==> none");
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continue;
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@@ -333,8 +286,9 @@ static int __init early_fill_mp_bus_info(void)
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}
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}
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update_res(info, start, end, IORESOURCE_MEM, 1);
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update_range(range, start, end);
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update_res(info, cap_resource(start), cap_resource(end),
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IORESOURCE_MEM, 1);
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subtract_range(range, RANGE_NUM, start, end + 1);
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printk(KERN_CONT "\n");
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}
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@@ -348,8 +302,8 @@ static int __init early_fill_mp_bus_info(void)
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address = MSR_K8_TOP_MEM2;
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rdmsrl(address, val);
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end = (val & 0xffffff800000ULL);
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printk(KERN_INFO "TOM2: %016lx aka %ldM\n", end, end>>20);
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update_range(range, 1ULL<<32, end - 1);
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printk(KERN_INFO "TOM2: %016llx aka %lldM\n", end, end>>20);
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subtract_range(range, RANGE_NUM, 1ULL<<32, end);
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}
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/*
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@@ -368,7 +322,8 @@ static int __init early_fill_mp_bus_info(void)
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if (!range[i].end)
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continue;
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update_res(info, range[i].start, range[i].end,
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update_res(info, cap_resource(range[i].start),
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cap_resource(range[i].end - 1),
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IORESOURCE_MEM, 1);
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}
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}
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@@ -384,24 +339,14 @@ static int __init early_fill_mp_bus_info(void)
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info->bus_min, info->bus_max, info->node, info->link);
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for (j = 0; j < res_num; j++) {
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res = &info->res[j];
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printk(KERN_DEBUG "bus: %02x index %x %s: [%llx, %llx]\n",
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busnum, j,
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(res->flags & IORESOURCE_IO)?"io port":"mmio",
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res->start, res->end);
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printk(KERN_DEBUG "bus: %02x index %x %pR\n",
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busnum, j, res);
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}
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}
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return 0;
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}
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#else /* !CONFIG_X86_64 */
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static int __init early_fill_mp_bus_info(void) { return 0; }
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#endif /* !CONFIG_X86_64 */
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/* common 32/64 bit code */
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#define ENABLE_CF8_EXT_CFG (1ULL << 46)
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static void enable_pci_io_ecs(void *unused)
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@@ -1,11 +1,11 @@
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/range.h>
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#include "bus_numa.h"
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int pci_root_num;
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struct pci_root_info pci_root_info[PCI_ROOT_NR];
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int found_all_numa_early;
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void x86_pci_root_bus_res_quirks(struct pci_bus *b)
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{
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@@ -21,10 +21,6 @@ void x86_pci_root_bus_res_quirks(struct pci_bus *b)
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if (!pci_root_num)
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return;
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/* for amd, if only one root bus, don't need to do anything */
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if (pci_root_num < 2 && found_all_numa_early)
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return;
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for (i = 0; i < pci_root_num; i++) {
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if (pci_root_info[i].bus_min == b->number)
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break;
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@@ -52,8 +48,8 @@ void x86_pci_root_bus_res_quirks(struct pci_bus *b)
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}
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}
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void __devinit update_res(struct pci_root_info *info, size_t start,
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size_t end, unsigned long flags, int merge)
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void __devinit update_res(struct pci_root_info *info, resource_size_t start,
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resource_size_t end, unsigned long flags, int merge)
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{
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int i;
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struct resource *res;
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@@ -61,25 +57,28 @@ void __devinit update_res(struct pci_root_info *info, size_t start,
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if (start > end)
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return;
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if (start == MAX_RESOURCE)
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return;
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if (!merge)
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goto addit;
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/* try to merge it with old one */
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for (i = 0; i < info->res_num; i++) {
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size_t final_start, final_end;
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size_t common_start, common_end;
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resource_size_t final_start, final_end;
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resource_size_t common_start, common_end;
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res = &info->res[i];
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if (res->flags != flags)
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continue;
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common_start = max((size_t)res->start, start);
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common_end = min((size_t)res->end, end);
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common_start = max(res->start, start);
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common_end = min(res->end, end);
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if (common_start > common_end + 1)
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continue;
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final_start = min((size_t)res->start, start);
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final_end = max((size_t)res->end, end);
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final_start = min(res->start, start);
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final_end = max(res->end, end);
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res->start = final_start;
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res->end = final_end;
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@@ -1,5 +1,5 @@
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#ifdef CONFIG_X86_64
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#ifndef __BUS_NUMA_H
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#define __BUS_NUMA_H
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/*
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* sub bus (transparent) will use entres from 3 to store extra from
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* root, so need to make sure we have enough slot there.
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@@ -19,8 +19,7 @@ struct pci_root_info {
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#define PCI_ROOT_NR 4
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extern int pci_root_num;
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extern struct pci_root_info pci_root_info[PCI_ROOT_NR];
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extern int found_all_numa_early;
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extern void update_res(struct pci_root_info *info, size_t start,
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size_t end, unsigned long flags, int merge);
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extern void update_res(struct pci_root_info *info, resource_size_t start,
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resource_size_t end, unsigned long flags, int merge);
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#endif
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@@ -255,10 +255,6 @@ void __init pcibios_resource_survey(void)
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*/
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fs_initcall(pcibios_assign_resources);
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void __weak x86_pci_root_bus_res_quirks(struct pci_bus *b)
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{
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}
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/*
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* If we set up a device for bus mastering, we need to check the latency
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* timer as certain crappy BIOSes forget to set it properly.
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Block a user