tg3: Make the TX BD DMA limit configurable
The 57766 ASIC rev will impose a new TX BD DMA limit on the driver. This patch prepares for 57766 support by making the tx BD DMA limit tunable. Signed-off-by: Matt Carlson <mcarlson@broadcom.com> Reviewed-by: Michael Chan <mchan@broadcom.com> Reviewed-by: Benjamin Li <benli@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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David S. Miller

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@@ -2994,6 +2994,7 @@ struct tg3 {
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/* begin "tx thread" cacheline section */
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void (*write32_tx_mbox) (struct tg3 *, u32,
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u32);
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u32 dma_limit;
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/* begin "rx thread" cacheline section */
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struct tg3_napi napi[TG3_IRQ_MAX_VECS];
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