ASoC: fsl_micfil: explicitly clear software reset bit
[ Upstream commit 292709b9cf3ba470af94b62c9bb60284cc581b79 ] SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined as non volatile register, it still remain in regmap cache after set, then every update of REG_MICFIL_CTRL1, software reset happens. to avoid this, clear it explicitly. Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com> Link: https://lore.kernel.org/r/1651925654-32060-1-git-send-email-shengjiu.wang@nxp.com Signed-off-by: Mark Brown <broonie@kernel.org> Signed-off-by: Sasha Levin <sashal@kernel.org>
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committed by
Greg Kroah-Hartman

parent
75454b4bbf
commit
a49c1a7307
@@ -190,6 +190,17 @@ static int fsl_micfil_reset(struct device *dev)
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return ret;
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return ret;
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}
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}
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/*
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* SRES is self-cleared bit, but REG_MICFIL_CTRL1 is defined
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* as non-volatile register, so SRES still remain in regmap
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* cache after set, that every update of REG_MICFIL_CTRL1,
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* software reset happens. so clear it explicitly.
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*/
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ret = regmap_clear_bits(micfil->regmap, REG_MICFIL_CTRL1,
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MICFIL_CTRL1_SRES);
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if (ret)
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return ret;
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return 0;
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return 0;
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}
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}
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