Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal
Pull thermal soc updates from Eduardo Valentin: - thermal core has a new devm_* API for registering cooling devices. I took the entire series, that is why you see changes on drivers/hwmon in this pull (Guenter Roeck) - rockchip thermal driver gains support to PX30 SoC (Elaine Zhang) - the generic-adc thermal driver now considers the lookup table DT property as optional (Jean-Francois Dagenais) - Refactoring of tsens thermal driver (Amit Kucheria) - Cleanups on cpu cooling driver (Daniel Lezcano) - broadcom thermal driver dropped support to ACPI (Srinath Mannam) - tegra thermal driver gains support to OC hw throttle and GPU throtle (Wei Ni) - Fixes in several thermal drivers. * 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/evalenti/linux-soc-thermal: (59 commits) hwmon: (pwm-fan) Use devm_thermal_of_cooling_device_register hwmon: (npcm750-pwm-fan) Use devm_thermal_of_cooling_device_register hwmon: (mlxreg-fan) Use devm_thermal_of_cooling_device_register hwmon: (gpio-fan) Use devm_thermal_of_cooling_device_register hwmon: (aspeed-pwm-tacho) Use devm_thermal_of_cooling_device_register thermal: rcar_gen3_thermal: Fix to show correct trip points number thermal: rcar_thermal: update calculation formula for R-Car Gen3 SoCs thermal: cpu_cooling: Actually trace CPU load in thermal_power_cpu_get_power thermal: rockchip: Support the PX30 SoC in thermal driver dt-bindings: rockchip-thermal: Support the PX30 SoC compatible thermal: rockchip: fix up the tsadc pinctrl setting error thermal: broadcom: Remove ACPI support thermal: Fix build error of missing devm_ioremap_resource on UM thermal/drivers/cpu_cooling: Remove pointless field thermal/drivers/cpu_cooling: Add Software Package Data Exchange (SPDX) thermal/drivers/cpu_cooling: Fixup the header and copyright thermal/drivers/cpu_cooling: Remove pointless test in power2state() thermal: rcar_gen3_thermal: disable interrupt in .remove thermal: rcar_gen3_thermal: fix interrupt type thermal: Introduce devm_thermal_of_cooling_device_register ...
This commit is contained in:
Linus Torvalds
@@ -0,0 +1,33 @@
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Amazon's Annapurna Labs Thermal Sensor
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Simple thermal device that allows temperature reading by a single MMIO
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transaction.
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Required properties:
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- compatible: "amazon,al-thermal".
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- reg: The physical base address and length of the sensor's registers.
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- #thermal-sensor-cells: Must be 1. See ./thermal.txt for a description.
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Example:
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thermal: thermal {
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compatible = "amazon,al-thermal";
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reg = <0x0 0x05002860 0x0 0x1>;
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#thermal-sensor-cells = <0x1>;
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};
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thermal-zones {
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thermal-z0 {
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polling-delay-passive = <250>;
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polling-delay = <1000>;
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thermal-sensors = <&thermal 0>;
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trips {
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critical {
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temperature = <105000>;
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hysteresis = <2000>;
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type = "critical";
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};
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};
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};
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};
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@@ -52,13 +52,47 @@ Required properties :
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Must set as following values:
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TEGRA_SOCTHERM_THROT_LEVEL_LOW, TEGRA_SOCTHERM_THROT_LEVEL_MED
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TEGRA_SOCTHERM_THROT_LEVEL_HIGH, TEGRA_SOCTHERM_THROT_LEVEL_NONE
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- nvidia,gpu-throt-level: This property is for Tegra124 and Tegra210.
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It is the level of pulse skippers, which used to throttle clock
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frequencies. It indicates gpu clock throttling depth and can be
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programmed to any of the following values which represent a throttling
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percentage:
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TEGRA_SOCTHERM_THROT_LEVEL_NONE (0%)
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TEGRA_SOCTHERM_THROT_LEVEL_LOW (50%),
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TEGRA_SOCTHERM_THROT_LEVEL_MED (75%),
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TEGRA_SOCTHERM_THROT_LEVEL_HIGH (85%).
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- #cooling-cells: Should be 1. This cooling device only support on/off state.
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See ./thermal.txt for a description of this property.
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Optional properties: The following properties are T210 specific and
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valid only for OCx throttle events.
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- nvidia,count-threshold: Specifies the number of OC events that are
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required for triggering an interrupt. Interrupts are not triggered if
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the property is missing. A value of 0 will interrupt on every OC alarm.
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- nvidia,polarity-active-low: Configures the polarity of the OC alaram
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signal. If present, this means assert low, otherwise assert high.
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- nvidia,alarm-filter: Number of clocks to filter event. When the filter
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expires (which means the OC event has not occurred for a long time),
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the counter is cleared and filter is rearmed. Default value is 0.
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- nvidia,throttle-period-us: Specifies the number of uSec for which
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throttling is engaged after the OC event is deasserted. Default value
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is 0.
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Optional properties:
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- nvidia,thermtrips : When present, this property specifies the temperature at
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which the soctherm hardware will assert the thermal trigger signal to the
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Power Management IC, which can be configured to reset or shutdown the device.
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It is an array of pairs where each pair represents a tsensor id followed by a
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temperature in milli Celcius. In the absence of this property the critical
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trip point will be used for thermtrip temperature.
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Note:
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- the "critical" type trip points will be set to SOC_THERM hardware as the
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shut down temperature. Once the temperature of this thermal zone is higher
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than it, the system will be shutdown or reset by hardware.
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- the "critical" type trip points will be used to set the temperature at which
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the SOC_THERM hardware will assert a thermal trigger if the "nvidia,thermtrips"
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property is missing. When the thermtrips property is present, the breach of a
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critical trip point is reported back to the thermal framework to implement
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software shutdown.
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- the "hot" type trip points will be set to SOC_THERM hardware as the throttle
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temperature. Once the the temperature of this thermal zone is higher
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than it, it will trigger the HW throttle event.
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@@ -79,25 +113,32 @@ Example :
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#thermal-sensor-cells = <1>;
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nvidia,thermtrips = <TEGRA124_SOCTHERM_SENSOR_CPU 102500
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TEGRA124_SOCTHERM_SENSOR_GPU 103000>;
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throttle-cfgs {
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/*
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* When the "heavy" cooling device triggered,
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* the HW will skip cpu clock's pulse in 85% depth
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* the HW will skip cpu clock's pulse in 85% depth,
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* skip gpu clock's pulse in 85% level
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*/
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throttle_heavy: heavy {
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nvidia,priority = <100>;
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nvidia,cpu-throt-percent = <85>;
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nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_HIGH>;
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#cooling-cells = <1>;
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};
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/*
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* When the "light" cooling device triggered,
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* the HW will skip cpu clock's pulse in 50% depth
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* the HW will skip cpu clock's pulse in 50% depth,
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* skip gpu clock's pulse in 50% level
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*/
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throttle_light: light {
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nvidia,priority = <80>;
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nvidia,cpu-throt-percent = <50>;
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nvidia,gpu-throt-level = <TEGRA_SOCTHERM_THROT_LEVEL_LOW>;
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#cooling-cells = <1>;
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};
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@@ -107,6 +148,17 @@ Example :
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* arbiter will select the highest priority as the final throttle
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* settings to skip cpu pulse.
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*/
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throttle_oc1: oc1 {
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nvidia,priority = <50>;
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nvidia,polarity-active-low;
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nvidia,count-threshold = <100>;
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nvidia,alarm-filter = <5100000>;
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nvidia,throttle-period-us = <0>;
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nvidia,cpu-throt-percent = <75>;
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nvidia,gpu-throt-level =
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<TEGRA_SOCTHERM_THROT_LEVEL_MED>;
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};
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};
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};
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@@ -6,11 +6,14 @@ Required properties:
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- "qcom,msm8916-tsens" (MSM8916)
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- "qcom,msm8974-tsens" (MSM8974)
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- "qcom,msm8996-tsens" (MSM8996)
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- "qcom,qcs404-tsens", "qcom,tsens-v1" (QCS404)
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- "qcom,msm8998-tsens", "qcom,tsens-v2" (MSM8998)
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- "qcom,sdm845-tsens", "qcom,tsens-v2" (SDM845)
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The generic "qcom,tsens-v2" property must be used as a fallback for any SoC
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with version 2 of the TSENS IP. MSM8996 is the only exception because the
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generic property did not exist when support was added.
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Similarly, the generic "qcom,tsens-v1" property must be used as a fallback for
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any SoC with version 1 of the TSENS IP.
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- reg: Address range of the thermal registers.
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New platforms containing v2.x.y of the TSENS IP must specify the SROT and TM
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@@ -39,3 +42,14 @@ tsens0: thermal-sensor@c263000 {
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#qcom,sensors = <13>;
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#thermal-sensor-cells = <1>;
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};
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Example 3 (for any platform containing v1 of the TSENS IP):
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tsens: thermal-sensor@4a9000 {
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compatible = "qcom,qcs404-tsens", "qcom,tsens-v1";
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reg = <0x004a9000 0x1000>, /* TM */
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<0x004a8000 0x1000>; /* SROT */
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nvmem-cells = <&tsens_caldata>;
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nvmem-cell-names = "calib";
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#qcom,sensors = <10>;
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#thermal-sensor-cells = <1>;
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};
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@@ -2,6 +2,7 @@
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Required properties:
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- compatible : should be "rockchip,<name>-tsadc"
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"rockchip,px30-tsadc": found on PX30 SoCs
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"rockchip,rv1108-tsadc": found on RV1108 SoCs
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"rockchip,rk3228-tsadc": found on RK3228 SoCs
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"rockchip,rk3288-tsadc": found on RK3288 SoCs
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@@ -8,16 +8,22 @@ temperature using voltage-temperature lookup table.
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Required properties:
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===================
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- compatible: Must be "generic-adc-thermal".
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- #thermal-sensor-cells: Should be 1. See ./thermal.txt for a description
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of this property.
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Optional properties:
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===================
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- temperature-lookup-table: Two dimensional array of Integer; lookup table
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to map the relation between ADC value and
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temperature. When ADC is read, the value is
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looked up on the table to get the equivalent
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temperature.
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The first value of the each row of array is the
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temperature in milliCelsius and second value of
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the each row of array is the ADC read value.
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- #thermal-sensor-cells: Should be 1. See ./thermal.txt for a description
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of this property.
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If not specified, driver assumes the ADC channel
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gives milliCelsius directly.
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Example :
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#include <dt-bindings/thermal/thermal.h>
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